i.MX8xQuadPlus UART1_RX GPIO usage

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i.MX8xQuadPlus UART1_RX GPIO usage

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nlbutts
Contributor III

I'm trying to use UART1_RX (ball L31) on an i.MX8XQuadPlus processor. I have the device tree pinctrl setup as follows:

IMX8QXP_UART1_RX_LSIO_GPT1_CLK 0x26000060 // IMX8_FREQ_IN

nlbutts_0-1641498866484.png

 

nlbutts_1-1641498873578.png

This should be GPIO0 pin 22:

nlbutts_2-1641498891607.png

 

I have a 1 Hz square wave being fed into this pin. 

nlbutts_3-1641498954455.png

 

But when I try to read this pin in Linux it always reads low:

root@imx8qxpdeere:~# gpioget gpiochip0 22
0
root@imx8qxpdeere:~# gpioget gpiochip0 22
0
root@imx8qxpdeere:~# gpioget gpiochip0 22
0
root@imx8qxpdeere:~# gpioget gpiochip0 22
0
root@imx8qxpdeere:~# gpioget gpiochip0 22
0
root@imx8qxpdeere:~# gpioget gpiochip0 22
0
root@imx8qxpdeere:~# gpioget gpiochip0 22
0

I looked through the errata and didn't see any mention of a GPIO pin. 

Any ideas?

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nlbutts
Contributor III

I had copied and pasted the wrong #define:

#define IMX8QXP_UART1_RX_LSIO_GPT1_CLK IMX8QXP_UART1_RX 3
#define IMX8QXP_UART1_RX_LSIO_GPIO0_IO22 IMX8QXP_UART1_RX 4

I used the former, when I meant to use the later.

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453 Views
nlbutts
Contributor III

I had copied and pasted the wrong #define:

#define IMX8QXP_UART1_RX_LSIO_GPT1_CLK IMX8QXP_UART1_RX 3
#define IMX8QXP_UART1_RX_LSIO_GPIO0_IO22 IMX8QXP_UART1_RX 4

I used the former, when I meant to use the later.

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