i.MX8QXP: SAI MCLK frequency

[jran]

Hi,

I'm working on a custom i.MX8QXP board with TLV320AIC3105 audio codec connected to SAI0.

I'm trying to use the codec simple-audio-card but I've run into some issues.

When booting Linux, I get this:

[ 2.678025] tlv320aic31xx-codec 16-0018: aic31xx_set_dai_sysclk: Unsupported frequency 12288000
[ 2.686769] tlv320aic31xx-codec 16-0018: simple-card: set_sysclk error

How can I change the frequency from 12.288MHz to say 19.2 MHz?

I have the following setup in my device tree:

sound {
   compatible = "simple-audio-card";
   simple-audio-card,name = "TLV320AIC3105";
   simple-audio-card,format = "i2s";
   simple-audio-card,bitclock-master = <&dailink_master>;
   simple-audio-card,frame-master = <&dailink_master>;
   simple-audio-card,widgets = 
      "Line", "Line In",
      "Line", "Line Out";

   simple-audio-card,routing = 
      "Line Out", "HPL",
      "Line Out", "HPR",
      "Line In", "MIC1LP",
      "Line In", "MIC1RP";

   simple-audio-card,cpu {
      sound-dai = <&sai0>;
   };

   dailink_master: simple-audio-card,codec {
      sound-dai = <&tlv320aic31xx>;
   };
};



tlv320aic31xx: tlv320aic31xx@18 {
   compatible = "ti,tlv320aic310x";
   reg = <0x18>;
   reset-gpios = <&lsio_gpio1 12 GPIO_ACTIVE_LOW>;

   power-domains = <&pd IMX_SC_R_MCLK_OUT_0>;
   clocks = <&mclkout0_lpcg 0>;
   assigned-clocks = <&clk IMX_SC_R_AUDIO_PLL_0 IMX_SC_PM_CLK_PLL>,
      <&clk IMX_SC_R_AUDIO_PLL_0 IMX_SC_PM_CLK_SLV_BUS>,
      <&clk IMX_SC_R_AUDIO_PLL_0 IMX_SC_PM_CLK_MST_BUS>,
      <&mclkout0_lpcg 0>;
   assigned-clock-rates = <786432000>, <49152000>, <12288000>, <19200000>;   // Last element here was originally 1228800, my change made no difference
   HPVDD-supply = <&reg_audio_3v3>;
   SPRVDD-supply = <&reg_audio_3v3>;
   SPLVDD-supply = <&reg_audio_3v3>;
   AVDD-supply = <&reg_audio_3v3>;
   IOVDD-supply = <&reg_audio_1v8>;
   DVDD-supply = <&reg_audio_1v8>;
};



&sai0 {
   assigned-clocks = <&clk IMX_SC_R_AUDIO_PLL_0 IMX_SC_PM_CLK_PLL>,
   <&clk IMX_SC_R_AUDIO_PLL_0 IMX_SC_PM_CLK_SLV_BUS>,
   <&clk IMX_SC_R_AUDIO_PLL_0 IMX_SC_PM_CLK_MST_BUS>,
   <&sai0_lpcg 0>;
   assigned-clock-rates = <786432000>, <49152000>, <12288000>, <19200000>; // Last element here was originally 1228800, my change made no difference
   pinctrl-names = "default";
   pinctrl-0 = <&pinctrl_sai0>;
   #sound-dai-cells = <0>;

   status = "okay";
};‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍

[jran · Accepted solution]

Finally got this all working.

For anyone else finding this thread;

Turns out, the MCLK is enabled from W8960 codec driver:

   if (!IS_ERR(wm8960->mclk)) {
    ret = clk_prepare_enable(wm8960->mclk);
    if (ret) {
     dev_err(component->dev,
      "Failed to enable MCLK: %d\n",
      ret);
     return ret;
    }
   }‍‍‍‍‍‍‍‍‍

I'm sure the "right" place for doing such things would be in the ASoC driver but anyways. I didn't bother writing my own ASoC driver (using simple-card) so I just patched the TI driver instead, adding the above code (plus code for extracting mclk from device tree etc, also found in w8960.c).

Then the next major issue for me was that I tried using the tlv320aic31xx driver for tlv320aic3105 (one would think this is right based on its name...) but turns out this was incorrect. Tlv320aic31xx does not support 3105, there are major differences between 3105 and 3100, 3101, 3110 etc that is supported by 31xx driver.

The best driver to use for tlv320aic3105 is tlv320aic3x!

Although, the 3x driver needed some patch work in order to fully support the 3105 as well. But it was way closer, and did at least bring the 3105 codec into some action.

[joanxie]

refer to the dts file, current bsp use WM8960 with sai1, if you use sai0, did you set register like SAI1?

pinctrl_sai1: sai1grp {    fsl,pins = <     SC_P_SAI1_RXD_ADMA_SAI1_RXD 0x06000040     SC_P_SAI1_RXC_ADMA_SAI1_TXC 0x06000040     SC_P_SAI1_RXFS_ADMA_SAI1_TXFS 0x06000040     SC_P_SPI0_CS1_ADMA_SAI1_TXD 0x06000060     SC_P_SPI2_CS0_LSIO_GPIO1_IO00 0x06000040    >;
and refer to the dts file,the clock rate is：
&sai1 {  assigned-clocks = <&clk IMX8QXP_AUD_PLL0_DIV>,    <&clk IMX8QXP_AUD_ACM_AUD_PLL_CLK0_DIV>,    <&clk IMX8QXP_AUD_ACM_AUD_REC_CLK0_DIV>,    <&clk IMX8QXP_AUD_SAI_1_MCLK>;  assigned-clock-rates = <786432000>, <49152000>, <12288000>, <49152000>;  pinctrl-names = "default";  pinctrl-0 = <&pinctrl_sai1>;  status = "okay"; };
maybe you can refer to it

[jran]

I have setup the pins for SAI0:

pinctrl_sai0: sai0grp {
 fsl,pins = <
  IMX8QXP_SPI0_CS0_ADMA_SAI0_RXD  0x06000040
  IMX8QXP_SPI0_SCK_ADMA_SAI0_TXC  0x06000040
  IMX8QXP_SPI0_SDI_ADMA_SAI0_TXD  0x06000040
  IMX8QXP_SPI0_SDO_ADMA_SAI0_TXFS  0x06000040
  IMX8QXP_ADC_IN2_LSIO_GPIO1_IO12  0xc600004c
 >;
};‍‍‍‍‍‍‍‍‍

I managed to change the clock rate to 12 MHz by also changing the third "assigned-clock-rates":

assigned-clock-rates = <786432000>, <49152000>, <12000000>, <12000000>;‍

Now there are no errors written out during boot and the codec is registered as an ALSA device, that's a good start..

But there is no clock outputted on ADMA_ACM_MCLK_OUT0.

I don't quite understand where the MCLK is actually enabled in the BSP?