Hello,
I am trying to enable the secondary cores on i.MXMQ (only Cortex-A53). I don't use Linux, but I use u-boot for flashing a bare metal code.
I have followed the procedure here
https://source.codeaurora.org/external/imx/imx-atf/tree/plat/imx/imx8m/gpc_common.c?h=imx_5.4.70_2.3...
I therefore call:
void imx_set_cpu_secure_entry(unsigned int core_id, uintptr_t sec_entrypoint)
then:
void imx_set_cpu_pwr_on(unsigned int core_id)
then:
asm ("sev")
I use the entry point: 0x40000400 where my secondary boot functions is.
This powers up core 2, and my debugger shows that core 2 bounces between address 0x200 and 0xA7F8. I suspect this is the ROM code, in the WFE state, waiting for a start address.
- Can anyone please tell me the reason I can't bring up the cores?
- Is these the only steps required in order to boot secondary cores?
I really appreciate any answers!
Kind regards,
Bjørn
