[i.MX8M Plus] config uart4 for A53

[sophiehu]

Hi,

We want to change UART4 for A53, but not for debug console like here and here.
I also have read the solution in here.
And we have a custom board and change UART4 pin define as below.


However, I got crash when I access /dev/ttymxc3 by minicom. (also attach log file)

[ 56.546147] Unable to handle kernel NULL pointer dereference at virtual address 0000000000000000
[ 56.555412] Mem abort info:
[ 56.558205] ESR = 0x96000044
[ 56.561263] EC = 0x25: DABT (current EL), IL = 32 bits
[ 56.566572] SET = 0, FnV = 0
[ 56.569625] EA = 0, S1PTW = 0
[ 56.572765] Data abort info:
[ 56.575646] ISV = 0, ISS = 0x00000044
[ 56.579481] CM = 0, WnR = 1
[ 56.582450] user pgtable: 4k pages, 48-bit VAs, pgdp=000000010446a000
[ 56.588890] [0000000000000000] pgd=0000000000000000, p4d=0000000000000000
[ 56.595684] Internal error: Oops: 96000044 [#1] PREEMPT SMP
[ 56.601256] Modules linked in: fsl_jr_uio caam_jr caamkeyblob_desc caamhash_desc caamalg_desc crypto_engine rng_core authenc libdes imx8_media_dev(C) crct10dif_ce flexcan can_dev caam secvio error fuse
[ 56.619196] CPU: 2 PID: 656 Comm: minicom Tainted: G C 5.10.72-lts-5.10.y+gf2008c7f6f59 #1
[ 56.628761] Hardware name: NXP i.MX8MPlus EVK board (DT)
[ 56.634074] pstate: 80000085 (Nzcv daIf -PAN -UAO -TCO BTYPE=--)
[ 56.640086] pc : sdma_transfer_init+0x130/0x260
[ 56.644617] lr : sdma_transfer_init+0xc0/0x260
[ 56.649059] sp : ffff800012d7ba50
[ 56.652372] x29: ffff800012d7ba50 x28: ffff0000c0af1108
[ 56.657685] x27: ffff0000c4139c01 x26: ffff0000c0af46a8
[ 56.662997] x25: 0000000000000080 x24: 0000000000000000
[ 56.668313] x23: 0000000000000100 x22: ffff0000c0af0080
[ 56.673627] x21: ffff800011d4d200 x20: ffff0000c1ede100
[ 56.678940] x19: ffff0000c0af1108 x18: 0000000000000000
[ 56.684253] x17: 0000000000000000 x16: 0000000000000000
[ 56.689567] x15: 001fffffffffffff x14: 0000000000180000
[ 56.694880] x13: 0000000000008000 x12: 0000000000001000 2 | Online 0:0 | ttymxc3
[ 56.700196] x11: 00000000ffffffff x10: ffff800012d7ba70
[ 56.705512] x9 : 0000000000000000 x8 : ffff800011fe8000
[ 56.710828] x7 : 0000000000000000 x6 : 000000000000003f
[ 56.716141] x5 : 0000000000000040 x4 : 0000000000000000
[ 56.721454] x3 : ffff0000c0af46a8 x2 : 0000000000000001
[ 56.726767] x1 : 00000000000002ed x0 : 0000000001830020
[ 56.732081] Call trace:
[ 56.734528] sdma_transfer_init+0x130/0x260
[ 56.738712] sdma_prep_slave_sg+0x6c/0x280
[ 56.742809] imx_uart_dma_tx+0xdc/0x230
[ 56.746645] imx_uart_start_tx+0x10c/0x230
[ 56.750743] __uart_start.isra.0+0x3c/0x50
[ 56.754842] uart_write+0x100/0x890
[ 56.758331] n_tty_write+0x2bc/0x46c
[ 56.761906] file_tty_write.constprop.0+0x138/0x290
[ 56.766783] tty_write+0x14/0x20
[ 56.770013] new_sync_write+0xe8/0x180
[ 56.773762] vfs_write+0x244/0x2a4
[ 56.777163] ksys_write+0x6c/0x100
[ 56.780566] __arm64_sys_write+0x20/0x30
[ 56.784491] el0_svc_common.constprop.0+0x78/0x1c4
[ 56.789280] do_el0_svc+0x24/0x8c
[ 56.792596] el0_svc+0x14/0x20
[ 56.795651] el0_sync_handler+0x1a4/0x1b0
[ 56.799660] el0_sync+0x180/0x1c0
[ 56.802979] Code: b90026a0 52800400 531b6af7 72a03060 (b9000300)
[ 56.809073] ---[ end trace 22834d1f5bd7291d ]---
[ 56.813691] note: minicom[656] exited with preempt_count 2

Here is my dts
pinctrl_uart4: uart4grp {
fsl,pins = <
MX8MP_IOMUXC_UART4_RXD__UART4_DCE_RX 0x00000106
MX8MP_IOMUXC_UART4_TXD__UART4_DCE_TX 0x00000106
MX8MP_IOMUXC_NAND_DATA03__UART4_DCE_RTS 0x00000106
MX8MP_IOMUXC_NAND_DATA02__UART4_DCE_CTS 0x00000106
>;
};

&uart4 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_uart4>;
assigned-clocks = <&clk IMX8MP_CLK_UART4>;
assigned-clock-parents = <&clk IMX8MP_SYS_PLL1_80M>;
fsl,uart-has-rtscts;
status = "okay";
};

Besides, I have tried to modify imx-atf/plat/imx/imx8m/imx8mp/imx8mp_bl31_setup.c like below, add all UART in struct imx_rdc_cfg, but it still crash.

static const struct imx_rdc_cfg rdc[] = {
/* Master domain assignment */
RDC_MDAn(RDC_MDA_M7, DID1),

/* peripherals domain permission */
RDC_PDAPn(RDC_PDAP_UART1, D0R | D0W),
RDC_PDAPn(RDC_PDAP_UART2, D0R | D0W),
RDC_PDAPn(RDC_PDAP_UART3, D0R | D0W),
RDC_PDAPn(RDC_PDAP_UART4, D0R | D0W),
RDC_PDAPn(RDC_PDAP_WDOG1, D0R | D0W),
RDC_PDAPn(RDC_PDAP_RDC, D0R | D0W | D1R),

/* memory region */

/* Sentinel */
{0},
};

Is anything wrong or missing?

Best Regards,
Sophie

[davehitchman1]

For me the CONFIG_IMX_SDMA  'fix' did nothing at all

I also tried CORE_IMAGE_EXTRA_INSTALL += " firmwared" from another post, this didnt help either

I have tried patching the dma out - that at least seems to avoid errors and crashes (which I guess I expected) but the uarts 3 and 4 are not working (though 1 and 2 are even though my patch takes the dma from uart1 which seemed to be working ok with it ... I just thought it was more sensible looking if they appeared the same but hey ho)

What is MOST disappointing is that the default stuff seems to come in a situation where you cant just enable the uart and it works, surely that would be the REAL answer to this? 

Where are NXP in this community, do they check and offer real answers - perhaps correct their code?

[ESK]

Is there any update ?

I had same kernel crash (same info)

There is no side effect with CONFIG_IMX_SDMA y to m ?

[sophiehu]

It seems OK.

[sophiehu · Accepted solution]

I found this topic and change CONFIG_IMX_SDMA from y to m, and there's no dma error or crash.

[sophiehu]

If I test uart by command, it shows this error:

root@imx8mpevk:~# stty -echo raw speed 115200 < /dev/ttymxc3
[ 152.659153] imx-uart 30a60000.serial: We cannot prepare for the RX slave dma!