i.MX8M EVK MIPI CSI Camera Frame Rate

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i.MX8M EVK MIPI CSI Camera Frame Rate

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felixradensky
Contributor IV

Hello,

We have purchased NXP MIPI-CSI camera MINISASTOCSI kit and followed the instructions in this application note https://www.nxp.com/docs/en/application-note/AN12187.pdf  to test the camera on NXP i.MX8M EVK rev B3 running L4.9.51-ga Linux BSP release. Both camera connectors were tested. The camera output was sent to HDMI display. The frame rate we've received is around 7fps, even in lowest resolution. What should be done to get the maximum frame rates advertised by the application note above (e.g. 30fps at 1080p).

Thanks.

Felix.

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25 Replies

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chunfengren
Contributor I

HI, Tom zheng

thanks for your patch you provide,  it work very well now.

if use 640*480 resolution to take video of moving object, recorded video is very clear and the video quality is good.

if use 1280*720(or 1920*1024) to take video of moving object, video is very  blur and the video quality isn't good.

is it be affected by no vpu in i.MX8M EVK?

How do I solve it?

thanks a lot

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haidong_zheng
NXP Employee
NXP Employee

Yes, i.MX8M does not have HW video encode. so, video encode is done by SW. If high FPS is needed in high resolution. Some encode simply and optimize are needed done by customer. 

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chunfengren
Contributor I

HI,Tom zheng

Thanks for your reply.

Do you have similar image encode code patch to support high resolution recording?

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haidong_zheng
NXP Employee
NXP Employee

no ,thanks! 

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chunfengren
Contributor I

I meet a similiar problem:

We have purchased NXP MIPI-CSI Ov5640 camera,
and we do camera test on NXP i.MX8M EVK, The camera output was sent to HDMI display.
when we preview and take video on ov5640, and  take video of  moving objects, video is very  blur.

from kernel logs to see , there is many RX fifo overflow, it make some  captured Frames by camera lost.

[  867.956960] mx6s-csi 30a90000.csi1_bridge: mx6s_csi_irq_handler Rx fifo overf
low
[  870.956451] mx6s-csi 30a90000.csi1_bridge: mx6s_csi_irq_handler Rx fifo overf
low
[  874.273032] mx6s-csi 30a90000.csi1_bridge: mx6s_csi_irq_handler Rx fifo overf
low 

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haidong_zheng
NXP Employee
NXP Employee

"rx fifo over flow" is another topic.

If you can, please carefully apply another two packages patches. 

One package(tuning.7z) include ATF, u-Boot, Kernel patches for DDR.

Another package(Camera.tar.bz2) include CSI driver patches. 

Two packages must be applied on GA release for this problem. 

If you still meet the "rx fifo over flow" after those packages merged, please tell us how to repeat it and show us the log info. 

Thanks! 

1,514 Views
vsuneja63
Contributor III

Hi Tom,

I am facing same "rx fifo overflow" error with MINISASTOCSI camera. I am trying to apply attached patches but its failing. I am using

kernel 4.19.35

u-boot-imx-2019.04

Does these patches will work with these system configuration on imx8mq-evk target?

Thanks & Regards,

Vipul Kumar

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haidong_zheng
NXP Employee
NXP Employee

Hi Suneja:

The SDK is & after 4.14.78 already inlcuded theose patches.

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jobusch
Contributor I

Hello Tom,

thank you for providing these patches. We have a similar problem. We get FIFO_RX_overflow error too. But only when we have high cpu usage at the same time. So thats why your "tuning" patches seem perfect. But they do not fit my version. I am running 4.14.78. On which GA version are the patches made for?

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haidong_zheng
NXP Employee
NXP Employee

Busch:

4.14.78 should already include those patches.

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jobusch
Contributor I

Do you have any other idea, how to fix RX FIFO Overflow errors then?

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haidong_zheng
NXP Employee
NXP Employee

Johannes:

@Liu Liu<mailto:weiping.liu@nxp.com> could you share your idea about this ?

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weiping_liu
NXP Employee
NXP Employee

Hi Tom,

The recommended workaround for this erratum is to avoid MIPI CSI overflow happen. Two undocumented debug registers can be used to monitor CSI FIFO levels in real time. When FIFO reaches one threshold, disable CSI and restart CSI.

For example, create one program on M4 core to monitor CSI FIFO level and do as follows:

  1. Read the CSI FIFO debug registers: Register CSI1_CSICR19 (0x30A9_004C) for MIPI CS1 or register CSI2_CSICR19 ( 0x30B8_004C) for MIPI CSI2
  2. If  the value of register CSIx_CSICR19 is larger than 192, Set register CSI_PHY_CTL_REG (0x30A7_0104 for MIPI CS1 or 0x30B6_0104 for MIPI CSI2) as 0xff to restart CSI.
  3. Wait for 3us. Jump to step 1).
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james_kim
Contributor II

Thanks Tom,

It really helped me. 

James

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Bio_TICFSL
NXP TechSupport
NXP TechSupport

Hi Felix,

Did it work for you as well?

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felixradensky
Contributor IV

Hi,

Yes it works for me. It was me posting as Ofer Austerlitz.

Thanks.

Felix.

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felixradensky
Contributor IV

Hello Lily,

With eMMC patches applied and number of buffers increased we get 18fps at 1080p

Felix

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haidong_zheng
NXP Employee
NXP Employee

hi Felix:

Please check FPS by below command:

gst-launch-1.0 v4l2src ! video/x-raw,width=1920,height=1080 ! fpsdisplaysink

And please enable dma-coherent in fsl-imx8mq.dtsi for csix_bridge:

csi1_bridge: csi1_bridge@30a90000 {
compatible = "fsl,imx8mq-csi", "fsl,imx6s-csi";
reg = <0x0 0x30a90000 0x0 0x10000>;
interrupts = <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clk IMX8MQ_CLK_DUMMY>,
<&clk IMX8MQ_CLK_CSI1_ROOT>,
<&clk IMX8MQ_CLK_DUMMY>;
clock-names = "disp-axi", "csi_mclk", "disp_dcic";
dma-coherent;
status = "disabled";
};

csi2_bridge: csi2_bridge@30b80000 {
compatible = "fsl,imx8mq-csi", "fsl,imx6s-csi";
reg = <0x0 0x30b80000 0x0 0x10000>;
interrupts = <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clk IMX8MQ_CLK_DUMMY>,
<&clk IMX8MQ_CLK_CSI2_ROOT>,
<&clk IMX8MQ_CLK_DUMMY>;
clock-names = "disp-axi", "csi_mclk", "disp_dcic";
dma-coherent;
status = "disabled";
};

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oferausterlitz
Senior Contributor II

Hi Tom,

After adding dma-coherent property we get about 30fps at 1080p, which is great. We've also tested maximum resolution, 2592x1944 and received the following error:

0:00:00.643195654   510      0xff16ca0 ERROR         v4l2bufferpool gstv4l2bufferpool.c:854:gst_v4l2_buffer_pool_start:<v4l2src0:pool:src> we received 6 buffer from device '/dev/video0', we want at least 7

With DMA coherency enabled, is it necessary to increase GST_V4L2_MIN_BUFFERS to 7 ? Can this parameter be modified at run-time instead of compile-time ?

Thanks a lot.

Felix.

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haidong_zheng
NXP Employee
NXP Employee

hi Felix:

You can decrease GST_V4L2_MIN_BUFFERS  or increase MAX_VIDEO_MEM in drivers/media/platform/mxc/capture/mx6s_capture.c to enable camera resolution 2592x1944 preview work, but this resolution performance is not good, that is about 8 FPS.  I will check this. 

 

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