i.MX8 LPDDR4

[santosh_t]

Hello,

We are using MIMX8MM3CVTKZAA in our design. In the EVK file of i.MX8 (SPF-31399), referring to DDR section,  all the lines of Channel A of LPDDR4 is connected to Channel B of processor. For example pin H4(CS0_A) of LPDDR4 is connected to V4(CS0_B) of processor. Is it intentional? What is the reason behind this?

Thanks & Regards,

Santosh Tuppad

[igorpadykov]

Hi SANTOSH 

both channels are equal, so seems change was made due to board routing convenience.

Best regards
igor
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