i.MX6q PCIe Mem assign error and Possible Works ??

[aden]

Hello,

I am trying to interface with PLX switch ic and 4 FPGAs using PCIe.

During pcie bring up sequence, I got memory assign errors.

Then, We tried to modify the kernel source to increase PCIE Memory regions

PCIE_ARB_BASE_ADDR and PCIE_ARB_END_ADDR in mx6.h.

/* CPU Memory Map */

#define PCIE_ARB_BASE_ADDR 0xE0000000

#define PCIE_ARB_END_ADDR 0xFFFFFFFF

But System crash happened in function imx_pcie_regions_setup. I am curious about the fundamental question whether it is  possible to increasePCIe memory by modifying or not? moreover, Can we assign memory resource to another place?

Hope your help

Best regards

Aden Lim

Kernel 3.0.35

LOG

root@freescale ~$ lspci
00:00.0 Class 0604: 16c3:abcd
01:00.0 Class 0604: 10b5:8624
02:01.0 Class 0604: 10b5:8624
02:04.0 Class 0604: 10b5:8624
02:05.0 Class 0604: 10b5:8624
02:06.0 Class 0604: 10b5:8624
02:08.0 Class 0604: 10b5:8624
02:09.0 Class 0604: 10b5:8624
05:00.0 Class 1180: 1b03:7800

06:00.0 Class 1180: 1b03:7800

I got follow dmesg

root@freescale ~$ dmesg | grep pci
iMX6 PCIe PCIe RC mode imx_pcie_pltfm_probe entering.
PCIE: imx_pcie_pltfm_probe start link up.
pci 0000:00:00.0: [16c3:abcd] type 1 class 0x000604
pci 0000:00:00.0: reg 10: [mem 0x00000000-0x000fffff 64bit pref]
pci 0000:00:00.0: reg 38: [mem 0x00000000-0x0000ffff pref]
pci 0000:00:00.0: supports D1
pci 0000:00:00.0: PME# supported from D0 D1 D3hot D3cold
pci 0000:00:00.0: PME# disabled
pci 0000:01:00.0: [10b5:8624] type 1 class 0x000604
pci 0000:01:00.0: reg 10: [mem 0x00000000-0x0001ffff]
pci 0000:01:00.0: PME# supported from D0 D3hot D3cold
pci 0000:01:00.0: PME# disabled
pci 0000:02:01.0: [10b5:8624] type 1 class 0x000604
pci 0000:02:01.0: PME# supported from D0 D3hot D3cold
pci 0000:02:01.0: PME# disabled
pci 0000:02:04.0: [10b5:8624] type 1 class 0x000604
pci 0000:02:04.0: PME# supported from D0 D3hot D3cold
pci 0000:02:04.0: PME# disabled
pci 0000:02:05.0: [10b5:8624] type 1 class 0x000604
pci 0000:02:05.0: PME# supported from D0 D3hot D3cold
pci 0000:02:05.0: PME# disabled
pci 0000:02:06.0: [10b5:8624] type 1 class 0x000604
pci 0000:02:06.0: PME# supported from D0 D3hot D3cold
pci 0000:02:06.0: PME# disabled
pci 0000:02:08.0: [10b5:8624] type 1 class 0x000604
pci 0000:02:08.0: PME# supported from D0 D3hot D3cold
pci 0000:02:08.0: PME# disabled
pci 0000:02:09.0: [10b5:8624] type 1 class 0x000604
pci 0000:02:09.0: PME# supported from D0 D3hot D3cold
pci 0000:02:09.0: PME# disabled
pci 0000:05:00.0: [1b03:7800] type 0 class 0x001180
pci 0000:05:00.0: reg 10: [mem 0x00000000-0x0003ffff]
pci 0000:05:00.0: reg 14: [mem 0x00000000-0x007fffff]
pci 0000:05:00.0: reg 18: [mem 0x00000000-0x007fffff]
pci 0000:05:00.0: reg 1c: [mem 0x00000000-0x00ffffff]
pci 0000:05:00.0: reg 20: [mem 0x00000000-0x01ffffff]
pci 0000:06:00.0: [1b03:7800] type 0 class 0x001180
pci 0000:06:00.0: reg 10: [mem 0x00000000-0x0003ffff]
pci 0000:06:00.0: reg 14: [mem 0x00000000-0x007fffff]
pci 0000:06:00.0: reg 18: [mem 0x00000000-0x007fffff]
pci 0000:06:00.0: reg 1c: [mem 0x00000000-0x00ffffff]
pci 0000:06:00.0: reg 20: [mem 0x00000000-0x01ffffff]
pci 0000:00:00.0: BAR 8: can't assign mem (size 0x8a00000)
pci 0000:00:00.0: BAR 0: assigned [mem 0x01000000-0x010fffff 64bit pref]

pci 0000:00:00.0: BAR 0: set to [mem 0x01000000-0x010fffff 64bit pref] (PCI add)

pci 0000:00:00.0: BAR 6: assigned [mem 0x01100000-0x0110ffff pref]
pci 0000:01:00.0: BAR 8: can't assign mem (size 0x8800000)
pci 0000:01:00.0: BAR 0: can't assign mem (size 0x20000)
pci 0000:02:05.0: BAR 8: can't assign mem (size 0x4400000)
pci 0000:02:06.0: BAR 8: can't assign mem (size 0x4400000)
pci 0000:02:01.0: PCI bridge to [bus 03-03]
pci 0000:02:01.0:   bridge window [io  disabled]
pci 0000:02:01.0:   bridge window [mem disabled]
pci 0000:02:01.0:   bridge window [mem pref disabled]
pci 0000:02:04.0: PCI bridge to [bus 04-04]
pci 0000:02:04.0:   bridge window [io  disabled]
pci 0000:02:04.0:   bridge window [mem disabled]
pci 0000:02:04.0:   bridge window [mem pref disabled]
pci 0000:05:00.0: BAR 4: can't assign mem (size 0x2000000)
pci 0000:05:00.0: BAR 3: can't assign mem (size 0x1000000)
pci 0000:05:00.0: BAR 1: can't assign mem (size 0x800000)
pci 0000:05:00.0: BAR 2: can't assign mem (size 0x800000)
pci 0000:05:00.0: BAR 0: can't assign mem (size 0x40000)
pci 0000:02:05.0: PCI bridge to [bus 05-05]
pci 0000:02:05.0:   bridge window [io  disabled]
pci 0000:02:05.0:   bridge window [mem disabled]
pci 0000:02:05.0:   bridge window [mem pref disabled]
pci 0000:06:00.0: BAR 4: can't assign mem (size 0x2000000)
pci 0000:06:00.0: BAR 3: can't assign mem (size 0x1000000)
pci 0000:06:00.0: BAR 1: can't assign mem (size 0x800000)
pci 0000:06:00.0: BAR 2: can't assign mem (size 0x800000)
pci 0000:06:00.0: BAR 0: can't assign mem (size 0x40000)
pci 0000:02:06.0: PCI bridge to [bus 06-06]
pci 0000:02:06.0:   bridge window [io  disabled]
pci 0000:02:06.0:   bridge window [mem disabled]
pci 0000:02:06.0:   bridge window [mem pref disabled]
pci 0000:02:08.0: PCI bridge to [bus 07-07]
pci 0000:02:08.0:   bridge window [io  disabled]
pci 0000:02:08.0:   bridge window [mem disabled]
pci 0000:02:08.0:   bridge window [mem pref disabled]
pci 0000:02:09.0: PCI bridge to [bus 08-08]
pci 0000:02:09.0:   bridge window [io  disabled]
pci 0000:02:09.0:   bridge window [mem disabled]
pci 0000:02:09.0:   bridge window [mem pref disabled]
pci 0000:01:00.0: PCI bridge to [bus 02-08]
pci 0000:01:00.0:   bridge window [io  disabled]
pci 0000:01:00.0:   bridge window [mem disabled]
pci 0000:01:00.0:   bridge window [mem pref disabled]
pci 0000:00:00.0: PCI bridge to [bus 01-08]
pci 0000:00:00.0:   bridge window [io  disabled]
pci 0000:00:00.0:   bridge window [mem disabled]

pci 0000:00:00.0:   bridge window [mem pref disabled]  

[Yuri]

Hello,

Please refer to the followingRe: PCIe BAR length limit

Have a great day,
Yuri

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