i.MX6UL Power-Rails

取消
显示结果 
显示  仅  | 搜索替代 
您的意思是: 
已解决

i.MX6UL Power-Rails

跳至解决方案
927 次查看
juergene
Contributor III

Hello community,

i wanted to know, why are the following power rails shown in the MCIMX6UL-EVK design schematic

VDD_ARM_IN: 400 mA

VDD_SOC_IN: 500 mA

pastedImage_1.png

Because there is only one power rail and this is VDD_SOC_IN.

Defined with a maximum supply current of 500 mA (i.MX6UL datasheet)

pastedImage_0.png

Does it mean the i.MX6UL need more than 500 mA at VDD_SOC_IN - Rail (900 mA given from schmeatic) ?

Best regards

标签 (1)
0 项奖励
回复
1 解答
793 次查看
gusarambula
NXP TechSupport
NXP TechSupport

Hello Juergen Elst,

The values on the i.MX6UL Datasheet are correct. I would say that the reason why there is more capacity on the schematic is because it’s using LDOs instead of a PMIC so they are listing the capacity of the LDO itself rather than the requirements.

The extra current does not hurt but should not be required.

Regards,

在原帖中查看解决方案

1 回复
794 次查看
gusarambula
NXP TechSupport
NXP TechSupport

Hello Juergen Elst,

The values on the i.MX6UL Datasheet are correct. I would say that the reason why there is more capacity on the schematic is because it’s using LDOs instead of a PMIC so they are listing the capacity of the LDO itself rather than the requirements.

The extra current does not hurt but should not be required.

Regards,