i.MX6Q IPU Error Interrupts.

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i.MX6Q IPU Error Interrupts.

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satoshishimoda
Senior Contributor I

Hi community,

I have a question about i.MX6DQ reference manual (IMX6DQRM Rev.1).

Please see the explanation above Table 37-36.

It says what is happened when these errors in Table 37-36 occurred and what should user do to resolve the errors.

And in last sentence, it says "In that case the system may need to increase the clock to the IPU or simplify the use case.".

Could you let me know which clock in Table 37-8 is indicated as "clock to the IPU" in this sentence?

hsp_clk? or ipu_master_hclk?

Best Regards,

Satoshi Shimoda

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Yuri
NXP TechSupport
NXP TechSupport

  In the case of IPU Error  Interrupts we have performance problem. Please try to

decrease screen resolution and / or frame rate. Also, other system resource

consuming processes, such as USB / SD / SATA transfer, may affect. As result

a general performance  issue may take place in the case. Perhaps it makes sense

to try system prioritization (such as provided by Linux nice command).

Note, the base clock for the IPU is IPUx_HSP_CLK_ROOT.


Have a great day,
Yuri

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202 Views
Yuri
NXP TechSupport
NXP TechSupport

  In the case of IPU Error  Interrupts we have performance problem. Please try to

decrease screen resolution and / or frame rate. Also, other system resource

consuming processes, such as USB / SD / SATA transfer, may affect. As result

a general performance  issue may take place in the case. Perhaps it makes sense

to try system prioritization (such as provided by Linux nice command).

Note, the base clock for the IPU is IPUx_HSP_CLK_ROOT.


Have a great day,
Yuri

-----------------------------------------------------------------------------------------------------------------------
Note: If this post answers your question, please click the Correct Answer button. Thank you!
-----------------------------------------------------------------------------------------------------------------------

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