i.MX6 cold boot delay

[arttupulli]

Hello,

What is the minimal time that i.MX6Q takes from cold boot until boot ROM code transfers execution to user-implemented code, usually U-Boot? I could swear I read from somewhere that it's close to 100 ms, but we're currently seeing times closer to 500 ms before U-Boot starts execution.

Thanks in advance,

Arttu

[Yuri]

Arttu,

Boot timing of i.MX6 includes the following stages :

- power on ;
- boot decision ;
- IVT /DCD processing ;
- HAB checking.

Boot time depends on boot device speed, and typically it takes ~50 ms,

as You mentioned. But, please pay attention really boot ROM starts

only after clock stabilization – it may take several hundred ms for crystal.

Have a great day,
Yuri

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[arttupulli]

Yuri,

Thanks for your quick reply.

Our DCD is pretty simple, it only covers memory setup and sets some clock registers, consisting of ~100 DATA/write register lines of code. Would I be correct in assuming that this should not cause the increased boot time before U-Boot? At least not the huge jump from your mentioned 50 ms to the ~500 ms delay we are seeing currently?

Edit:

Also, on warm boot out of reset, we are getting about 50 ms delay from releasing reset to the start of U-Boot. As this sounds exactly the time you mentioned, I wanted to ask the following: are those 4 bullets (power on, boot decision, IVT/DCD, HAB) you mentioned executed on every boot, be it from reset or cold boot? If they are always executed on both boots, then the delay must indeed come before even the boot ROM code execution.

Best regards,

Arttu

[Yuri]

Arttu,

please look at my comments below.

1.
> Would I be correct in assuming that this should not cause the increased boot time before U-Boot?

Correct.

2.
As for boot stages, more details are provided  below.

  2.1 ) power on - this is hardware option, dependent of power up (PMIC) sequence  ;

  2.2) boot decision - ROM code decides where to boot from ;

  2.3) IVT /DCD processing && 2.4) HAB checking - really this stage includes ROM code
          accesses external memory, authenticate, runs DCD, copy and jump to image. Result will vary  
          according to boot image size.

Regards,

Yuri.

[arttupulli]

Yuri,

I measured how long our HW takes to stabilize after it is powered up, and at least the CPU POR pin was ready and oscillator stabilized in ~15 ms, so neither explains the extra 500 ms delay during cold boot. Image size etc. probably does not explain the delay either, since like I said, the difference is between booting from reset or power-on, and the image is probably handled identically in both cases, correct?

Regarding the different boot stages, could you confirm which stages are present on cold boot and warm boot, respectively? The boot decision and the stages after that probably have to be always executed, but what about the "2.1) Power-on"? Is this stage handled differently during boots from power-on and reset? Or is there something else that is done differently on CPU side during cold&warm boots?

BR,

Arttu

[Yuri]

  Power on is not present under warm boot.

If HAB verification is used - it may take a time, especially if this is provided in software.

Regards,

Yuri.

[arttupulli]

Thanks. One more thing, could you kindly point me to some specification/manual/reference on the mentioned "power on" boot stage, so I could check that our PMIC is doing what the i.MX SoC is requiring. I didn't find such information from the i.MX6Q Reference Manual, it was mostly explaining the boot stages after that.

BR,

Arttu

[JerryFan]

Arttu,

What the boot device here,the SD card, what's the image size, what's the boot configuation?

Usually, SD card itself need long time for cold initialization, >100ms, depends on the SD card type, thus BootROM has to wait for time for SD card's initialization's finishing.

B.R

Jerry

[arttupulli]

Hi Jerry,

boot device is an on-board eMMC chip and boot mode is set to "internal boot" (BOOT_MODE[1:0] = 0b10). Image is about 200kB U-Boot .imx file. On a related note, we are getting over 20 MiB/s read speeds from the eMMC in U-Boot, so the chip itself should be working fine.

BR,

Arttu