i.MX6 IPU Driver (RGB888 Format)

[kaangencay]

Hello,

I have a project based on i.MX6 processor and 7" TFT LCD which has 24-bit RGB888 format and I need to use the IPU module to drive it. I used the codes supplied in the i.MX6_Platform_SDK as a guide during driver development.

In the SDK, the IPU driver was developed for RGB565 format LCD displays. I tried to change it to RGB888 but it didn't work. The display is just initialized with black background and some colored pixels.

To verify that the clocks and data are as intended, I connected the probe to the CLK and DAT lines which, respectively, give the right clock signal and the random data that results in the random pixels on the LCD. 

Below are the panel information;

panel_info_ptr->refresh_rate = 60; /*60 Hz*/
panel_info_ptr->width = 800;
panel_info_ptr->height = 480;
panel_info_ptr->pixel_clock = 29232000; /*60*525*928*/
panel_info_ptr->hsync_start_width = 88; /*hsync backporch*/
panel_info_ptr->hsync_width = 48; /*hsync pulse width*/
panel_info_ptr->hsync_end_width = 40; /*hsync front porch*/
panel_info_ptr->vsync_start_width = 32;
panel_info_ptr->vsync_width = 3;
panel_info_ptr->vsync_end_width = 13;
panel_info_ptr->delay_h2v = 0;
panel_info_ptr->interlaced = 0;
panel_info_ptr->clk_sel = 0; /*internal*/
panel_info_ptr->clk_pol = 0;
panel_info_ptr->hsync_pol = 0;
panel_info_ptr->vsync_pol = 0;
panel_info_ptr->drdy_pol = 1;
panel_info_ptr->data_pol = 0;

Below are the lines that I changed for my display

idmac_info_ptr->npb = 19; /*(because 24 bit)*/

ipu_cpmem_set_field(get_ipu_cpmem_addr( channel), INTERLEAVED_BPP, 0x01/* 0x3*/);
ipu_cpmem_set_field(get_ipu_cpmem_addr( channel), INTERLEAVED_WID0, 8-1/*5 - 1*/);
ipu_cpmem_set_field(get_ipu_cpmem_addr( channel), INTERLEAVED_WID1, 8-1/*6 - 1*/);
ipu_cpmem_set_field(get_ipu_cpmem_addr( channel), INTERLEAVED_WID2, 8-1/*5 - 1*/);
ipu_cpmem_set_field(get_ipu_cpmem_addr( channel), INTERLEAVED_WID3, 0 - 1);
ipu_cpmem_set_field(get_ipu_cpmem_addr( channel), INTERLEAVED_OFF0, 0);
ipu_cpmem_set_field(get_ipu_cpmem_addr( channel), INTERLEAVED_OFF1, 8/*5*/);
ipu_cpmem_set_field(get_ipu_cpmem_addr( channel), INTERLEAVED_OFF2, 16/*11*/);
ipu_cpmem_set_field(get_ipu_cpmem_addr( channel), INTERLEAVED_OFF3, 24/*16*/);

Attached you will find the photo of the display with the random pixels lit up.

Kind Regards,

Kaan

[igorpadykov]

Hi KAAN

may be useful to pay attention to data mapping described in

sect.37.4.7.5.1 Bus Mapping Unit i.MX6DQ Reference Manual

http://www.nxp.com/docs/en/reference-manual/IMX6DQRM.pdf

in linux one can look at SEIKO-WVGA settings

in  linux/drivers/video/fbdev/mxc/mxc_lcdif.c

linux-imx.git - i.MX Linux Kernel 

Best regards
igor
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[kaangencay]

Hi Igor,

The problem still persists, please see my post below. Can you think of anything else that might be causing the problem?

Edit: "DI0_SYNC_DISP_ERR" interrupt is fixed. But "IDMAC_TH_23" interrupt always ocurred.

Best Regards,

Kaan

[kaangencay]

Hi Igor, 

Thank you for the information.

I've checked my data mapping configurations and I figured out that microcodes mapping configuration wasn't disabled. I fixed it. As a result, only the random pixels locations changed. 

1- I've checked interrupt status registers, "DI0_SYNC_DISP_ERR" interrupt always occured. What does it mean? How can I fix it?

2- Is there any register to figure out whether IDMAC receives my "display_buffer" which has the raw image data, or where the buffer gets stuck at, e.g. IDMAC, DP, DC etc.?

Kind Regards,

Kaan