Hi Mateo.
In arch/arm/mach-mx28/device.c, mmc0 is only set with value MMC_CAP_4_BIT_DATA, mmc1 is set with value
MMC_CAP_4_BIT_DATA | MMC_CAP_8_BIT_DATA. You can modify mmc0_data
.caps = MMC_CAP_4_BIT_DATA | MMC_CAP_8_BIT_DATA to try.
static struct mxs_mmc_platform_data mmc0_data = {
.hw_init = mxs_mmc_hw_init_ssp0,
.hw_release = mxs_mmc_hw_release_ssp0,
.get_wp = mxs_mmc_get_wp_ssp0,
.cmd_pullup = mxs_mmc_cmd_pullup_ssp0,
.setclock = mxs_mmc_setclock_ssp0,
.caps = MMC_CAP_4_BIT_DATA,
.min_clk = 400000,
.max_clk = 48000000,
.read_uA = 50000,
.write_uA = 70000,
.clock_mmc = "ssp.0",
.power_mmc = NULL,
.fastpath_sz = 1024,
};
static struct mxs_mmc_platform_data mmc1_data = {
.hw_init = mxs_mmc_hw_init_ssp1,
.hw_release = mxs_mmc_hw_release_ssp1,
.get_wp = mxs_mmc_get_wp_ssp1,
.cmd_pullup = mxs_mmc_cmd_pullup_ssp1,
.setclock = mxs_mmc_setclock_ssp1,
.caps = MMC_CAP_4_BIT_DATA | MMC_CAP_8_BIT_DATA
| MMC_CAP_DATA_DDR,
.min_clk = 400000,
.max_clk = 48000000,
.read_uA = 50000,
.write_uA = 70000,
.clock_mmc = "ssp.1",
.power_mmc = NULL,
.fastpath_sz = 1024,
};
Grace