Hello Champs,
My customer is using an external clock circuit for 32.768KHz.
There is a spec for that in the data sheet.
They are using a circuit meets the spec(VOH/VOL) above, however the voltage at OSC32K_EXTAL is 2.3V which is lower than 0.7*VDD=2.31V.
This drop is considered because the circuit is providing clock not only to i.MX257 but also to a FPGA.
Is 2.3V for OSC32K_EXTAL OK?
What are VIH and VIL specs for OSC32K_EXTAL?
Best regards,
Nori Shinozaki
Solved! Go to Solution.
Hi Nori
Table 10 gives Vih/Vil for 32.768KHz
as Recommended External Reference Clock Specifications
~igor
Hi Nori
if voltage supply of OSC32K_EXTAL = 2.3V, VINL=0.69 (max)
VINH=1.61V(min)
Best regards
igor
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Hello Igor,
Thanks, but 2.3V is measured at customer's board.
There is no mention of Vih/Vil for 32.768KHz in the datasheet.
I'd like to know the spec.
Best regards,
Nori Shinozaki
Hi Nori
Table 10 gives Vih/Vil for 32.768KHz
as Recommended External Reference Clock Specifications
~igor
Hello Igor,
My customer reported that voltage of 32.768KHz at OSC32K_EXTAL is too low, so I took the capture with i.MX25 EVK.
Please take a look at the attached capture.
It is just 900mV!
It's lower than Vih(0.7 x VDD).
Is it acceptable?
The below is a 24MHz capture of i.MX25 EVK.
It's amplitude is 2.220V which is also lower than Vih
It seems like i.MX25 is absorbing lots of current inside.
Is there any way to stop i.MX25 absorbing like this?
Best regards,
Nori Shinozaki
Hi Nori
I believe you measured waveforms with crystal, not
with external clock. Provided answer was for external clock
levels.
Best regards
igor
Hello Igor,
Yes, it was from crystal.
You mean, using crystal. the 900mV at OSC32K_EXTAL is OK.
Using an external clock circuite, it must be over 2.31V
With that said, why do you think 3.3V from the external clock drops to 2.31V at OSC32K_EXTAL?
The customer thinks the possibility that i.MX25 absorbs the current inside.
Best regards,
Nori Shinozaki
Hi Nori
yes these data is for external clock,
OSC32K_EXTAL does not absorb signal.
In general one needs to use external clock generator
with sufficient drive capability.
Best regards
igor
Igor,
Thanks, I will check the customer's external clock design.
Best regards,
Nori Shinozaki
Hello Igor,
I found the power rail of OSC32K_EXTAL is DRYICE in Table 101.
So the Table 10 should be read as follows, right?
Best regards,
Nori Shinozaki
Hi Nori
yes, I think you are right
Best regards
igor