My application seems pretty standard. I'm using double buffering to capture a frame in one buffer, while the other buffer is being used for the eLCDIF. After every VSYNC, the buffers are swapped. My video source (i.e. camera) needs to be synced to the video output (i.e. display).
My target is basically to synchronize the eLCDIF to the CSI. If they are not exactly generating/displaying frames at the same rate and for example, the CSI is slightly faster (e.g. 60fps vs 59.95fps), then eventually there will be enough drift so that the double buffering will be disturbed (buffer 1 will be full before buffer 2 has been completely flushed). Dropped frames are not acceptable for me and I also don't want incomplete frames. Again, this all seems pretty reasonable.
As I don't really see a way to generate an LCD pixel clock that is locked to the CSI VSYNC using the internal PLL's, I had another look at the options available for the eLCDIF peripheral.
In DOTCLK_MODE, the peripheral normally continuously fetches and displays new frames without any breaks. However, there is an option to set BYPASS_COUNT to 0 in the LCDIF_CTRL register and manually control the RUN bit in LCDIF_CTRL to start the transfers. Would it be reasonable to use an external interrupt connected to the VSYNC_IN and toggle the RUN bit in an interrupt handler? I'm a bit worried about jitter, but perhaps it could be acceptable if the interrupt is handled fast enough.
