Hi, we are implementing low power mode on our custom iMX8 Mini based hardware and I cannot find any application note about LPDDR4 DLL-off mode configuration to reduce memory clock as low as possible, e.g 125MHz. We did that successfully for iMX7 based hardware with DDR3 memory following reference manual but cannot find any details for iMX8.
i.MX8MMini supports the DLL-off mode for DDR4/DDR3 memories, not for LPDDR4. The
DLL-off mode can be enabled by setting the bit 15 of the DDR controller's Master
Register 0. For details, refer to the Section 9.2.3.1.2 of i.MX8MMini RM.
Best Regards,
Artur