i.MX 6ULL// Use UART2 In OP-TEE only

[Karun]

I'm working in i.MX 6ULL.

I need to do same thing like this : https://github.com/OP-TEE/optee_os/issues/2438#2438 

UART1 is used for OP-TEE debug log.
I want to use UART2 in OP-TEE.

For that I have done the changes as mentioned in that issue.
Changes are as below.

in uboot:
file: imx-linux-kirkstone/build_secure/workspace/sources/u-boot-imx/board/freescale/mx6ullevk/mx6ullevk.c

static iomux_v3_cfg_t const uart2_pads[] = {
MX6_PAD_UART2_TX_DATA__UART2_DTE_RX | MUX_PAD_CTRL(UART_PAD_CTRL),
MX6_PAD_UART2_RX_DATA__UART2_DTE_TX | MUX_PAD_CTRL(UART_PAD_CTRL),
MX6_PAD_UART2_RTS_B__UART2_DTE_CTS | MUX_PAD_CTRL(UART_PAD_CTRL),
MX6_PAD_UART2_CTS_B__UART2_DTE_RTS | MUX_PAD_CTRL(UART_PAD_CTRL),
};

static void setup_iomux_uart(void)
{
setup_dtemode_uart();
imx_iomux_v3_setup_multiple_pads(uart1_pads, ARRAY_SIZE(uart1_pads));
imx_iomux_v3_setup_multiple_pads(uart2_pads, ARRAY_SIZE(uart2_pads));
}

In Kernel
Disabled UART2 from linux kernel:
file: arch/arm/boot/dts/imx6ul-14x14-evk.dtsi

&uart2 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_uart2>;
uart-has-rtscts;
/* for DTE mode, add below change /
/ fsl,dte-mode; /
/ pinctrl-0 = <&pinctrl_uart2dte>; */
status = "disabled";
};

file: drivers/clk/imx/clk-imx6ul.c
static int const clks_init_on[] __initconst = {
IMX6UL_CLK_AIPSTZ1, IMX6UL_CLK_AIPSTZ2, IMX6UL_CLK_AIPSTZ3,
IMX6UL_CLK_AXI, IMX6UL_CLK_ARM, IMX6UL_CLK_ROM,
IMX6UL_CLK_MMDC_P0_FAST, IMX6UL_CLK_MMDC_P0_IPG,
IMX6UL_CLK_OCOTP, IMX6UL_CLK_UART2_IPG, IMX6UL_CLK_UART2_SERIAL};

in imx-optee-os
file: optee/imx-optee-os/core/arch/arm/plat-imx/main.c

register_phys_mem_pgdir(MEM_AREA_IO_SEC, UART2_BASE, CORE_MMU_PGDIR_SIZE);

attached pta : core/pta/imx/uart_demo.c/

attached Host app: host_uart_demo.c

Getting below error:
# ./optee_uart
TEEC Init success: 0x0D/TC:? 0 tee_ta_init_pseudo_ta_session:296 Lookup pseudo TA aabbccdd-1122-3344-5566-778899aabbcc

D/TC:? 0 tee_ta_init_pseudo_ta_session:309 Open pta_uart2_demo
D/TC:? 0 tee_ta_init_pseudo_ta_session:326 pta_uart2_demo : aabbccdd-1122-3344-5566-778899aabbcc
OpenSession success: 0x0I/TC: >>> UART base=21e8000

D/TC:? 0 init_uart2:32 uart2_va = 0x80de8000
E/TC:? 0 init_uart2:42 >>> UART mapped!
D/TC:? 0 init_uart2:47 uart2_data.base.pa = 0x21e8000
D/TC:? 0 init_uart2:48 uart2_data.base.va = 0x80de8000
E/TC:? 0 init_uart2:56 >>> UART init!
I/TC: >>> UART va = 0x80de8000, ops = 0x840a845c
I/TC: PTA_CMD_UART_PUTC
I/TC: >>> UART SR = 0x4008
I/TC: >>> ops = 0x840a845c, putc = 0x84064fdd
[ 139.214962] 8<--- cut here ---
[ 139.218056] Unhandled fault: imprecise external abort (0x1c06) at 0x004b3194
[ 139.225117] pgd = 64e0aac0
[ 139.227836] [004b3194] *pgd=862e5835, *pte=881b575f, *ppte=881b5c7f
[ 139.234138] Internal error: : 1c06 [#1 ] SMP ARM
[ 139.238678] Modules linked in:
[ 139.241741] CPU: 0 PID: 429 Comm: optee_uart Not tainted 5.15.71-00006-g53c88ccf1338-dirty #27 
[ 139.250364] Hardware name: Freescale i.MX6 Ultralite (Device Tree)
[ 139.256549] PC is at __arm_smccc_smc+0x10/0x3c
[ 139.261011] LR is at optee_smccc_smc+0x3c/0x44
[ 139.265470] pc : [] lr : [] psr: 60080013
[ 139.271740] sp : c3c9bd80 ip : c3c9bd90 fp : ffff0004
[ 139.276971] r10: c0f76f2c r9 : c3c9bdec r8 : c38cd310
[ 139.282202] r7 : 00000000 r6 : 00000000 r5 : 00000000 r4 : 00000000
[ 139.288733] r3 : 00000000 r2 : 00000000 r1 : 00000000 r0 : 00000000
[ 139.295268] Flags: nZCv IRQs on FIQs on Mode SVC_32 ISA ARM Segment none
[ 139.302413] Control: 10c5387d Table: 839cc06a DAC: 00000051
[ 139.308164] Register r0 information: NULL pointer
[ 139.312882] Register r1 information: NULL pointer
[ 139.317595] Register r2 information: NULL pointer
[ 139.322305] Register r3 information: NULL pointer
[ 139.327017] Register r4 information: NULL pointer
[ 139.331730] Register r5 information: NULL pointer
[ 139.336441] Register r6 information: NULL pointer
[ 139.341153] Register r7 information: NULL pointer
[ 139.345865] Register r8 information: slab kmalloc-192 start c38cd300 pointer offset 16 size 192
[ 139.354601] Register r9 information: non-slab/vmalloc memory
[ 139.360269] Register r10 information: non-slab/vmalloc memory
[ 139.366025] Register r11 information: non-paged memory
[ 139.371175] Register r12 information: non-slab/vmalloc memory
[ 139.376928] Process optee_uart (pid: 429, stack limit = 0x9e99b3d7)
[ 139.383205] Stack: (0xc3c9bd80 to 0xc3c9c000)
[ 139.387576] bd80: c1f2e4c0 c38cd300 c3c9bddc c3a3e280 00000000 00000000 00000000 00000000
[ 139.395765] bda0: c3c9bddc 00000000 ffff0004 c0f77ecc 00000000 00000000 00000000 00000000
[ 139.403951] bdc0: c3c9bddc 00000000 c38cd324 c3c9a000 00000000 00000000 00000000 ffff0004
[ 139.412138] bde0: 00000000 00000000 00000000 c38cd324 c38cd324 00000000 00000000 c3c9bdfc
[ 139.420324] be00: c3c9bdfc 32000003 00000000 00000000 00000000 00000000 00000000 00000000
[ 139.428511] be20: 00000000 26cdbbcd c3c9be54 c3a3e300 c3c9bec0 c3a3e280 c62e2b00 c3a3e2c0
[ 139.436697] be40: 00000000 bec26b58 00000000 c0f784d4 00000000 c269e000 8269e000 26cdbbcd
[ 139.444884] be60: 00000051 00000000 00000000 c62e2b00 bec26b40 c3a3e280 c3c9bec0 c0f75a20
[ 139.453072] be80: 00000000 00000000 00000000 c3c9be8c c3c9be8c 26cdbbcd 00000019 c24da600
[ 139.461259] bea0: bec26b40 00000000 00000098 00000000 c2726d00 c039e9a4 00000004 00000000
[ 139.469445] bec0: 00000000 00000001 00000000 00000000 00000000 00000004 00000000 c27500c0
[ 139.477631] bee0: c3c9bf80 00000019 00000019 00000000 00000000 00000004 bec26bb7 26cdbbcd
[ 139.485820] bf00: 00000019 8010a403 c39e2a80 bec26ac0 bec26ab0 c39e2a80 00000003 c3ee23c8
[ 139.494006] bf20: 00000000 c04dea94 00000000 00000000 c27500c0 00000000 00000000 00000000
[ 139.502194] bf40: 00000000 00000000 00000000 00000000 00000000 00000000 00000019 26cdbbcd
[ 139.510380] bf60: 004b2190 c27500c0 c27500c0 00000000 00000000 c0300324 c3c9a000 26cdbbcd
[ 139.518567] bf80: 00000000 bec26c38 00000000 bec26ac0 00000036 c0300324 c3c9a000 00000036
[ 139.526754] bfa0: 00000000 c03000c0 bec26c38 00000000 00000003 8010a403 bec26ab0 bec26aa0
[ 139.534941] bfc0: bec26c38 00000000 bec26ac0 00000036 00000000 bec26ab0 bec26b58 00000000
[ 139.543128] bfe0: 00000036 bec26a88 b6ed8269 b6e51ae6 60080030 00000003 00000000 00000000
[ 139.551319] [] (__arm_smccc_smc) from [] (optee_smccc_smc+0x3c/0x44)
[ 139.559438] [] (optee_smccc_smc) from [] (optee_do_call_with_arg+0x11c/0x2ec)
[ 139.568338] [] (optee_do_call_with_arg) from [] (optee_invoke_func+0x10c/0x188)
[ 139.577408] [] (optee_invoke_func) from [] (tee_ioctl+0xfec/0x1140)
[ 139.585434] [] (tee_ioctl) from [] (sys_ioctl+0x570/0xca8)
[ 139.592684] [] (sys_ioctl) from [] (ret_fast_syscall+0x0/0x58)
[ 139.600278] Exception stack(0xc3c9bfa8 to 0xc3c9bff0)
[ 139.605340] bfa0: bec26c38 00000000 00000003 8010a403 bec26ab0 bec26aa0
[ 139.613527] bfc0: bec26c38 00000000 bec26ac0 00000036 00000000 bec26ab0 bec26b58 00000000
[ 139.621711] bfe0: 00000036 bec26a88 b6ed8269 b6e51ae6
[ 139.626777] Code: e1a0c00d e92d00f0 e89c00f0 e1600070 (e59d4024)
[ 139.632880] ---[ end trace a7195b6f43be961b ]---
Segmentation fault

attached Full boot log: optee-log.txt 

May I know what I'm missing?

[Karun]

@ha and nxp team

any update for us ,

we are stuck in this issue 
we have found some old ways , but that are not applicable on new uboot and kernel source 
so please provide us the solution for the  issue we are getting.

[Harvey021]

can try to copy another UART2 driver in PTA and use a specific log function in the PTA.

Regards

Harvey

[Karun]

To clarify my use case: I need to keep UART1 as-is, since it's being used as the debug UART.
In addition, I want to use UART2 for a different purpose, specifically within a separate PTA.
So both UART1 and UART2 will be active in OP-TEE:

UART1 → as debug console
UART2 → used by my custom PTA, my PTA communicating over UART2.

I followed the approach described in #2438 to enable UART2, but I encountered an error during runtime.

[Karun]

The issue is still unresolved, and I haven’t received any response yet.

[Harvey021]

Hi @Karun 

I'm working on the issue, Will revert back to you soon, sorry for the delay.

Regards

Harvey

[Karun]

Hello @Harvey021 ,

any update for us ?

please let us know any steps and solution to proceed further

[Karun]

Hello @Harvey021 ,

any update for us ,

Latest observation ,

- we are starting microcom with 115200 baudrate in background and then doing uart communication using optee example , so that thing works.

- uart2 clocks are not by default started and when we start microcom then and then only it is getting started ,

we have checked in /sys/kernel/debug/clk/clk_summary

so seems like clock is managed by kernel driver itself.

So how can we totally configure uart with clocks to access it securely ?