i.MX 6 Solo, DDR3 and fly-by topology

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i.MX 6 Solo, DDR3 and fly-by topology

948 次查看
rustemkhakimov
Contributor I

Hi,

We want use controller i.MX 6 Solo (MCIMX6S5EVM10AC) and 2 chips DDR3 (K4B4G1646D-BMK0). For routing we will use fly-by topology. Document  "Hardware Development Guide for i.MX 6Quad, 6Dual, 6DualLite, 6Solo Families of Applications Processors" have small information about fly-by topology. Are there tips for using the fly-by topology is similar to table 3-3 of the document "Hardware Development Guide ..."?

Example of routing will also very helpful.

Thanks.

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art
NXP Employee
NXP Employee

Yes, for fly-by topology routing, use the "routing by byte group" rules, given in the Table 3-3 of the Hardware Development Guide document. Also, refer to the Sections 3.5.5 and 3.5.7 for routing examples.


Have a great day,
Artur

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