custom iomux defination in devicetree

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custom iomux defination in devicetree

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atakanakbulut
Contributor II

Hello im triying to define custom pin settings for in devicetree but im not understanding register value

for example 

MX7D_PAD_SAI1_TX_DATA__GPIO6_IO15 0x1b << this registers 
MX7D_PAD_SAI1_TX_BCLK__GPIO6_IO13 0x80000000 << this registers 

i inspected to referance manual tables, pin multiplexing topics but i could see any answer my question

Other example i will select under picture this pin ALT5_GPIO6_IO15 

What is this register's name and how i can calculate this register lastly what is Reserved meaning

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igorpadykov
NXP TechSupport
NXP TechSupport

Hi Atakan

for 0x80000000 one can look at linux documentation

linux/Documentation/devicetree/bindings/pinctrl/fsl,imx-pinctrl.txt

fsl,imx-pinctrl.txt\pinctrl\bindings\devicetree\Documentation - linux-imx - i.MX Linux kernel 

"MX7D_PAD_SAI1_TX_DATA__GPIO6_IO15 0x1b << this registers"

makes setting for register IOMUXC_SW_PAD_CTL_PAD_SAI1_TX_DATA
described in sect.8.2.7.283 SW_PAD_CTL_PAD_SAI1_TX_DATA SW PAD Control
Register (IOMUXC_SW_PAD_CTL_PAD_SAI1_TX_DATA) i.MX7D Reference Manual.

Description of device tree can be found in AN5125 Introduction to Device Tree

https://www.nxp.com/docs/en/application-note/AN5125.pdf 

Best regards
igor
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