Follow up question on a similar issue - the LVDS1_CLK_SEL field in the CCM_ANALOG_MISC1 register...
Linux sets this to be 0x8000040B ( so 0b01011 for that field) which is not present in the list:
00000 ARM_PLL — Arm PLL
00001 SYS_PLL — System PLL
00010 PFD4 — ref_pfd4_clk == pll2_pfd0_clk
00011 PFD5 — ref_pfd5_clk == pll2_pfd1_clk
00100 PFD6 — ref_pfd6_clk == pll2_pfd2_clk
00101 PFD7 — ref_pfd7_clk == pll2_pfd3_clk
00110 AUDIO_PLL — Audio PLL
00111 VIDEO_PLL — Video PLL
01000 MLB_PLL — MLB PLL
01001 ETHERNET_REF — ethernet ref clock (ENET_PLL)
01010 PCIE_REF — PCIe ref clock (125M)
01100 USB1_PLL — USB1 PLL clock
01101 USB2_PLL — USB2 PLL clock
01110 PFD0 — ref_pfd0_clk == pll3_pfd0_clk
01111 PFD1 — ref_pfd1_clk == pll3_pfd1_clk
10000 PFD2 — ref_pfd2_clk == pll3_pfd2_clk
10001 PFD3 — ref_pfd3_clk == pll3_pfd3_clk
10010 XTAL — xtal (24M)
10011 LVDS1 — LVDS1 (loopback)
10100 LVDS2 — LVDS2 (not useful)
10101 to 11111 ref_pfd7_clk == pll2_pfd3_clk