Understanding 8M Mini EVK JTAG Debug Port

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Understanding 8M Mini EVK JTAG Debug Port

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3,357 Views
adevries
Contributor V

Hello,

I've been reading about the JTAG debug capabilities of the 8M Mini, and I had some questions about the JTAG Debug port on the 8M Mini EVK. Please see a schematic image below:

pastedImage_1.png

Here are my questions:

1. Was this pin header designed to interface with any specific JTAG controller? Or was it just chosen randomly as a way for these signals to come out to pins?

2. Why is POR_B connected to one of these pins? I thought that JTAG only needed TMS, TCK, TDO, and TDI (with nTRST optional)? Does connecting to POR_B offer some kind of easier or additional control?

3. Why is JTAG_nTRST not connected to the JTAG Debug interface? Does the processor use this signal in debug or boundary scan mode? 

4. Is VDD_1V8 connected to pin 1 through a 100ohm resistor to allow a JTAG controller to sense the target voltage? Or is connected there for another purpose?

Thanks

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1 Solution
3,012 Views
Yuri
NXP Employee
NXP Employee

Hello,

 

  Please look at my comments below.

 

1.

  According to section 2.14 [JTAG connector (J902)] of the EVK Board Hardware User's Guide:
The i.MX 8M Mini applications processor has five JATG signals on the dedicated pins and one hardware

reset input signal (POR_B). Those signals are directly connected to the 10-pin 1.27-mm JTAG connector

J902. The five JTAG signals used by the processor are:

• JTAG_TCK—TAP clock

• JTAG_TMS—TAP machine state

• JTAG_TDI—TAP data in

• JTAG_TDO—TAP data out

• JTAG_nTRST—TAP reset request (active low)

 

https://www.nxp.com/webapp/Download?colCode=IMX8MMEVKHUG

 

  The JTAG connector is based on standard ARM 10 pins Cortex Debug Connector.

 

http://infocenter.arm.com/help/topic/com.arm.doc.faqs/attached/13634/cortex_debug_connectors.pdf

 

http://www2.keil.com/coresight/coresight-connectors/

 

2.

  The i.MX8Mm POR allows to fully reset i.MX8Mm if needed.

 

3.

  JTAG_nTRST signal is part of JTAG interface and can be used for Boundary Scan.

 

4.

  Correct - VDD_1V8, connected to pin 1 through a 100ohm resistor allows a JTAG

controller to sense the target voltage.

 

 

Have a great day,

Yuri.

 

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View solution in original post

2 Replies
3,013 Views
Yuri
NXP Employee
NXP Employee

Hello,

 

  Please look at my comments below.

 

1.

  According to section 2.14 [JTAG connector (J902)] of the EVK Board Hardware User's Guide:
The i.MX 8M Mini applications processor has five JATG signals on the dedicated pins and one hardware

reset input signal (POR_B). Those signals are directly connected to the 10-pin 1.27-mm JTAG connector

J902. The five JTAG signals used by the processor are:

• JTAG_TCK—TAP clock

• JTAG_TMS—TAP machine state

• JTAG_TDI—TAP data in

• JTAG_TDO—TAP data out

• JTAG_nTRST—TAP reset request (active low)

 

https://www.nxp.com/webapp/Download?colCode=IMX8MMEVKHUG

 

  The JTAG connector is based on standard ARM 10 pins Cortex Debug Connector.

 

http://infocenter.arm.com/help/topic/com.arm.doc.faqs/attached/13634/cortex_debug_connectors.pdf

 

http://www2.keil.com/coresight/coresight-connectors/

 

2.

  The i.MX8Mm POR allows to fully reset i.MX8Mm if needed.

 

3.

  JTAG_nTRST signal is part of JTAG interface and can be used for Boundary Scan.

 

4.

  Correct - VDD_1V8, connected to pin 1 through a 100ohm resistor allows a JTAG

controller to sense the target voltage.

 

 

Have a great day,

Yuri.

 

-------------------------------------------------------------------------------

Note:

- If this post answers your question, please click the "Mark Correct" button. Thank you!

- We are following threads for 7 weeks after the last post, later replies are ignored

 

Please open a new thread and refer to the closed one, if you have a related question at a later point in time.

3,012 Views
adevries
Contributor V

Hi Yuri,

Thanks, that helps me understand this much better!