Hi,
I've been successful so far in integrating the TW9992 decoder chip with the iMX8MP. Unfortunately, the picture that is produced is double (I expect a 720x480 frame, but get two 720x240 frames) - see image below. Due to hardware requirements, I have to ISI1 for the decoder chip interface. Does this mean that the video output is interlaced? If so, is there a way that I can deinterlace the video on the iMX8MP?
Thank you,
Mohammed
Hi Igor,
Thanks for getting back to me. Just to confirm, the patch only supports blending deinterlacing, and since I can't use blending (because I'm using ISI1 and blending is only supported on ISI0), I would have to modify the patch to support weaving (or line doubling) based de-interlacing.
Thanks
Mohammed
Hi Mohammed
for isi deinterlacing one can try to adapt patches from
recommended to use mx8_v4l2_cap_drm for testing:
use sect.13.4.3.4.1 Configuring de-interlacing i.MX 8M Plus Applications Processor Reference Manual
Best regards
igor
Hi Igor,
Thanks for getting back to me. Just to confirm, the patch only supports blending deinterlacing, and since I can't use blending (because I'm using ISI1 and blending is only supported on ISI0), I would have to modify the patch to support weaving (or line doubling) based de-interlacing.
Thanks
Mohammed