TVP5158 TV decoder(4ch D1 line or pixel interleave mode) on i.mx6

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TVP5158 TV decoder(4ch D1 line or pixel interleave mode) on i.mx6

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hyunhoshin
Contributor III

I'm using TVP5158 on i.mx6

1ch D1(720x480) working is fine.

but 4ch D1(line or pixel interleaved mode) is not working(I think that IPU is not recognized embedded sync)

(when 4ch D1 working, TVP5158 output data is bt.656(pixel clock 108Mhz) and using 8bit parallel interface.)

how can i work that?

please help..

1 Reply

804 Views
weidong_sun
NXP TechSupport
NXP TechSupport

Hi hyunho,

>> 4ch D1(line or pixel interleaved mode) + TVP5158 output data is bt.656(pixel clock 108Mhz).

  CSI parrallel ports(CSI0 & CSI1) on i.MX6 don't support this kinds of working mode!

Regards,

Weidong