SoloX LVDS display timing parameters and inverting the pixel clock

[ScottKerstein]

Hello,

We are trying to get an LVDS display up and running on the i.mx6SoloX, and are having trouble with two things.

1. Regardless of timing parameters entered, linux is using 38Mhz for pixel clock which is beyond the spec of our display (480x800)
2. The display appears to want active low clocking such that data is clocked in on the rising edge, but can’t find any way to change the SoloX LVDS Bridge to make it active low, is there a way to change the phase of the clock before the LVDS block?  I’d be really surprised if it can’t accommodate an inverted pixel clock, every display seems to do their own thing.

Thanks, in advance.

Scott

[igorpadykov]

HI Scott

1. one can look at examples for bringing-up new lcds

i.MX6Q LVDS Wrong clock issue

how to support WSVGA output in imx6sdq

2. typical ldb lcd data waveforms are given in HSD100PXN1-A00-C11 lcd

datasheet used with Sabre board

Re: IPU Usage on IMX6 processor..

Best regards

igor

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