SAI1 MCLK on iMX7

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SAI1 MCLK on iMX7

1,104 次查看
jbaptiste_marie
Contributor I

Hello,

I have a setup where iMX7 must act as a master on an I2S link. When using aplay everything seems to work properly. Using the oscilloscope I can see that bitclock works correctly and data are sent. However the MCLK is not generated by the iMX while it should be. Is there any specific settings for SAI1_MCLK so that it is enable

There is no example with iMX7 acting as a master on the SAI link and the documentation is pretty poor about this topic.

I use the simple-audio-card driver with a kernel 4.14.

Relevant information from my device tree is shown below

&sai1 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_sai1>;
assigned-clocks = <&clks IMX7D_SAI1_ROOT_SRC>,
<&clks IMX7D_SAI1_ROOT_CLK>;
assigned-clock-parents = <&clks IMX7D_PLL_AUDIO_POST_DIV>;
assigned-clock-rates = <0>, <13824000>;
status = "okay";
fsl,sai-mclk-direction-output;
};

pinctrl_sai1: sai1grp {
fsl,pins = <
MX7D_PAD_SAI1_RX_DATA__SAI1_RX_DATA0 0x1f
MX7D_PAD_SAI1_TX_BCLK__SAI1_TX_BCLK 0x1f
MX7D_PAD_SAI1_TX_SYNC__SAI1_TX_SYNC 0x1f
MX7D_PAD_SAI1_TX_DATA__SAI1_TX_DATA0 0x30
MX7D_PAD_SAI1_MCLK__SAI1_MCLK 0x1f
>;
};

Any ideas of what can be wrong? As everything else seems to work properly I guess a specific setting is missing for SAI1_MCLK.

Thanks for your help.

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257 次查看
per_orback
Contributor II

Hi  jbaptiste_marie,

The thread is quite old but I wounder if you solved the problem with the missing MCLK and remember what the solution was?

Best regards,

Per

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igorpadykov
NXP Employee
NXP Employee

Hi Jean-Baptiste

one can look at below links (seems by default it is configured as master)

https://community.nxp.com/message/922214?commentID=922214#comment-922214 

How to configure IMX7D_AUDIO_MCLK_ROOT_SRC for an external clock? 

Best regards
igor
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