RTC cant get snvs clock

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RTC cant get snvs clock

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adi1525
Contributor III

Hi,

I want use RTC in Imx6ul, I disbled rtc in MCA and enabled in main processor:

snvs_rtc {

   status = "enabled";

};

snvs: snvs@020cc000 {
   compatible = "fsl,sec-v4.0-mon", "syscon", "simple-mfd";
   reg = <0x020cc000 0x4000>;

   snvs_rtc: snvs-rtc-lp {
      compatible = "fsl,sec-v4.0-mon-rtc-lp";
      regmap = <&snvs>;
      offset = <0x34>;
      interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>,
      <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>;
};

but it did not work and I get information:

snvs-secvio 20cc000.caam-snvs: can't get snvs clock
snvs-secvio 20cc000.caam-snvs: violation handlers armed - non-secure state

hctosys: unable to open rtc device (rtc0)

hwclock: can't open '/dev/misc/rtc': No such file or directory

regards

Adrian

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8 Replies

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smvankampen
Contributor II

I have a similar problem with our i.mx6ul based custom board.

Yocto image based on SUMO branch: imx_4.14.98_2.0.0_ga
During kernel boot (optee enabled) the kernel tries to probe the rtc driver (snvs-rtc.c). when it tries to enable the rtc it returns with timeout. -110

I modified the driver to print the LPLR and HPLR register to check if the SNVS is locked but there are both zero. but the snvs LPCR register does not enables the rtc.

Testing this a couple of times I noticed that sometimes it can enable the rtc (and working rtc) but later on (same image, same kernel etc.) after a cold reboot it can not enable the rtc.

So me and my colleagues discussed this, but can not figure it out.

- Is this a timing based issue (changing timeout counter in the enable function does not have any effect)

- Is this a problem related to in which order in the snvs module sub peripherals are enabled

- Is it a power related issue (battery backed)

Perhaps someone on the forum has some good advice where to look.

part log of kernel boot:

input: 20cc000.snvs:snvs-powerkey as /devices/soc0/soc/2000000.aips-bus/20cc000.snvs/20cc000.snvs:snvs-powerkey/input/input0
input: fts_ts as /devices/soc0/soc/2100000.aips-bus/21a4000.i2c/i2c-1/1-0038/input/input1
HPLR: 0h
LPLR: 0h
snvs_rtc 20cc000.snvs:snvs-rtc-lp: failed to enable rtc -110
snvs_rtc: probe of 20cc000.snvs:snvs-rtc-lp failed with error -110

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tomasklein
Contributor II

Hello, Have you solved the problem yet ?

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smvankampen
Contributor II

No, not yet. We have still have the issue.

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ondrejhofierka
Contributor I

Hi Stephan,

we were able to solve the issue. Problem is that the RTC is actually secure RTC that means the RTC is meant for Secure world (OP-Tee). Which is not the problem. Problem is that RTC register are inside SNVS and this part is protected by Power Glitch Detector. The detector locks SNVS as soon as the power for low power part is switched off (battery/supercap is depleted) and only secure world can unlock it (u-boot or OP-Tee). So there are two possible solutions:

1) Unlock SNVS in OP-Tee (that was our approach) :

#define SNVS_HPCOMR 0x04
#define SNVS_LPSR 0x4C
#define SNVS_LPPGDR 0x64

#define SNVS_LPPGDR_INIT 0x41736166

/**
 * @brief Function unlocks SNVS for access from non-secure world 
 *
 * @retval TEE_SUCCESS Success
 * @retval TEE_ERROR_GENERIC Generic Error
 */
static TEE_Result snvs_unlock_init(void)
{  
 vaddr_t snvs = core_mmu_get_va(SNVS_BASE, MEM_AREA_IO_SEC);

 /* Initialization of PGD */
 write32(SNVS_LPPGDR_INIT, snvs + SNVS_LPPGDR);
 /* Zeroing of detected violations */
 write32(0xffffffff, snvs + SNVS_LPSR);

 /* Allowing of SNVS access from non-secure world */
 uint32_t val;
 val = read32(snvs + SNVS_HPCOMR);
 val |= 0x80000000;
 write32(val, snvs + SNVS_HPCOMR);

 return TEE_SUCCESS;
}

service_init(snvs_unlock_init);

2) Unlock in u-boot: This can be done in u-boot too for example in board_late_init(). It is bit easier there (no-MMU).

#define SNVS_LPPGDR_INIT 0x41736166

#define snvs_hpcomr *((u32*)(SNVS_BASE_ADDR + 0x04))
#define snvs_lpsr *((u32*)(SNVS_BASE_ADDR + 0x4C))
#define snvs_lppgdr *((u32*)(SNVS_BASE_ADDR + 0x64))


int board_late_init(void)
{
    snvs_hpcomr |= 0x80000000;
    snvs_lppgdr = SNVS_LPPGDR_INIT;
    snvs_lpsr = 0xffffffff;

}‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍

Please before you do that make sure that you are not using RTC in OP-Tee for secure relevant things. Probably not but it's better be careful.

6,783 Views
adi1525
Contributor III

Hi Igor, I finally found time to test this and tried install imx-test but I got error:

GEN ./Makefile
CHK include/generated/uapi/linux/version.h
CHK include/generated/utsrelease.h
CC kernel/bounds.s
CHK include/generated/bounds.h
CHK include/generated/timeconst.h
/bin/sh: 1: bc: not found
/home/adrian/workspace/ccimx6ulstarter-2.4/tmp/work-shared/ccimx6ulstarter/kernel-source/./Kbuild:67: recipe for target 'include/generated/timeconst.h' failed

$ which bc

/usr/bin/bc

$ bc --version

bc 1.06.95

I don't understand why bc is not found because i have installed it on my host computer and also add to image:

CORE_IMAGE_EXTRA_INSTALL += " bc"

So i tried install digi-examples-rtc from meta-digi-dey layer. When I start it I get only "/dev/rtc: No such file or directory"

and when system booting is writing: "hwclock: can't open '/dev/misc/rtc': No such file or directory"

My device tree and kernel option are the same as in first post.

Regards

Adrian

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adi1525
Contributor III

I commented command in kbuild:

#$(obj)/$(timeconst-file): kernel/time/timeconst.bc FORCE

# $(call filechk,gentimeconst)

I don't know if that is correct but it works :smileygrin:

but rtctest return my " dev/rtc0: no such file or directory"

Regards

Adrian

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igorpadykov
NXP Employee
NXP Employee

Hi Adrian

one can try guidelines provided in nxp yocto main page:

meta-fsl-arm/imx-test.inc at master · Freescale/meta-fsl-arm · GitHub 

https://community.nxp.com/docs/DOC-1616 

Best regards
igor

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igorpadykov
NXP Employee
NXP Employee

Hi Adrian

one can try rtc unit test:

mxc_rtc\test - imx-test - i.MX Driver Test Application Software 

use latest official nxp linux L4.14.78 release:

linux-imx - i.MX Linux kernel 

Best regards
igor
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