I'm attempting to use SAI1 on the RT1062 as an I2S master for transmit while using MCLK as an input from external clock source on the 1060 EVKB. I have SAI1 on the RT1062 working as an I2S master using MCLK generated from the internal PLL, and can see the MCLK output on pin 1 of J23, which is signal GPIO_AD_B1_09, as well as BCLK, etc on the same header.
I'm understanding from this thread:
https://community.nxp.com/t5/i-MX-Processors/SAI1-MCLK1-source-select/m-p/1435023
That I can use that same pin as MCLK input. I'm changing these register fields (p326-327 in RM):
- SAI1_MCLK1_SEL in IOMUXC_GPR_GPR1 - change from 000 to 011 to select MCLK pin
- SAI1_MCLK1_DIR in IOMUXC_GPR_GPR1 - change from 1 to 0 to select MCLK as an input
And, IOMUXC_SW_MUX_CTL_PAD_GPIO_AD_B1_09 is set to 3 in both cases, selecting AD_B1_09 to the MCLK function.
When I do this, and provide an external clock signal to pin 1 on of J23, I do not see I2S output however - no BCLK generation, etc.
Is there another register change that needs to happen to select MCLK as an input for I2S master transmission?
