Hi,
I am using RMII between IMX6DL MAC and BCM5221KPTG PHY. My clock generation is the following( using 50MHz CLOCK Buffer with 1 input and 2 outputs as shown below:
Osc_50MHz----->CLK_BUF ----#1----> PHY(REF_CLK)
|
| ----#2----> IMX6DL.GPIO_16 (RMII_REF_CLK)
What are the Layout rules that need to be followed as far as RMII length matching?
1. Does Connection 1 (CLK_BUF-->PHY_REF_CLK) need be length match to connection 2 above(CLK_BUF-->GPIO_16) ?
2.Does TXD1,TXD0 and TX_CTL need be length match as a group?
3. Does RXD1, RXD0 and RX_CTL need be length match as a group?
4. Does the TXD group above need to be length matched to the RXD group above?
Thanks,
LT
