Questions about i.mx6 solox clock settings

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Questions about i.mx6 solox clock settings

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will_peng
Contributor I

My software version is 3.14.28.
I want to control the PWM5 output waveform with the M4 core.
The output of PWM5 is normal when the A9 core does not boot to Linux. But every time the A9 core boots to linux, PWM5 cannot output the desired waveform.
I found that re-initializing the PWM5 controller through the M4 core allows the PWM5 to output some irregular waveforms.
I feel that Linux re-initialized the clock used by PWM5 at startup, causing PWM5 to not work properly.
Is there any way to make PWM5 continue to work without interruption after Linux starts?

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will_peng
Contributor I

Thank you!

I did not find the clock source of the PWM5 in Figure 19.2.

The Figure 49-1 of the IMX6SXRM show that the PWM clock have 3 source:

1.ipg_clk

2.ipg_clk_highfreq

3.ipg_clk_32k

The Table 19-3 show the PWMn Module Clock ande Clock Root

1.ipg_clk                                 perclk_clk_root

2.ipg_clk_highfreq                  perclk_clk_root

3.ipg_clk_32k                         ckil_sync_clk_root

I have tried to set the PWM5's Module Clock to these three colock source above,but there is nothing changed.

Please help me to select a clock source not used by linux.

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igorpadykov
NXP Employee
NXP Employee

one can use jtag and check pwm registers to know pwm parent clock,
try to debug (setting several breakpoints) using AN4553 Using Open Source
Debugging Tools for Linux on i.MX Processors and find place where linux
reinitializes pwm clock
https://www.nxp.com/docs/en/application-note/AN4553.pdf

Best regards
igor

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igorpadykov
NXP Employee
NXP Employee

Hi ww

one can check Figure 19-2. Clock Tree i.MX6SX Reference Manual

and find parent clocks used for generation of pwm clocks.

Then try to select for pwm parent clock or pll which were not used by linux.
http://www.nxp.com/docs/en/reference-manual/IMX6SXRM.pdf

Best regards
igor
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