Question, i.MX6SX eMMC boot

[SLICE]

Dear team,

I would like to ask about eMMC BOOT of i.MX6SX.

My customer is trying to boot-up i.MX6SX from eMMC.

And they saw that boot cannot be done in the following case.

- LCD1_DATA04(SRC_BOOT_CFG04)=H, LCD1_DATA15(SRC_BOOT_CFG15)=H

For the other settings such as below, the boot from eMMC can be done.

- LCD1_DATA04(SRC_BOOT_CFG04)=L, LCD1_DATA15(SRC_BOOT_CFG15)=L

- LCD1_DATA04(SRC_BOOT_CFG04)=L, LCD1_DATA15(SRC_BOOT_CFG15)=H

- LCD1_DATA04(SRC_BOOT_CFG04)=H, LCD1_DATA15(SRC_BOOT_CFG15)=L

They are using eMMC 4.41 compliant chip, and they believe that FastBoot mode and DDR mode can be enabled simultaneously for i.MX6SX eMMC boot.

Is it true?

If yes, please let me know what they should do to achieve enabling both of FastBoot mode and DDR mode.

Thanks,

Miyamoto

[weidong_sun]

Hello Masamichi,

 >>is it true?

If yes, please let me know what they should do to achieve enabling both of FastBoot mode and DDR mode.

Yes, FastBoot and DDR mode can be used simultaneously. But these 2 modes must be supported by eMMC device.

Have a great day,
(Weidong)

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[SLICE]

Hello Weidong,

Thanks for your comment.

The customer uses eMMC 4.41 compliant device, so the eMMC chip supports both of FastMode and DDR mode.

Correct?

Thanks,

Miyamoto

[SLICE]

Hello Weidong,

I am still waiting for you!

The customer uses eMMC 4.41 compliant device,

So could you please give advice to achieve eMMC boot with FastBoot and DDR mode simultaneously?

Best Regards,

Miyamoto

[SLICE]

Hello,

I am still waiting for you!

BR,

miyamoto

[weidong_sun]

Hello Masamichi,

    Sorry for my late reply!

    I checked errata for i.MX6SX( see document "IMX6SXCE.pdf"), There are no errors clarified on Fast boot with DDR mode in it, so Fast boot with DDR mode should be supported by i.MX6SX.

    I configured boot selection according to i.MX6SX EVK board, see following, please!

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BOOT_CFG1[7:6] = 01     LCD1_DATA7=0      LCD1_DATA6=1           boot from uSHDC

BOOT_CFG1[5] = 1          LCD1_DATA5 = 1                                         MMC protocal

BOOT_CFG1[4] = 1          LCD1_DATA4 = 1                                         Fast boot mode

BOOT_CFG1[3:2]=x0       LCD1_DATA3 = x     LCD1_DATA2 = 0         Fast boot ACK enable

BOOT_CFG1[1] = 1         LCD1_DATA1 = 1                                          eMMC reset enabled via the SD_RST pad

BOOT_CFG1[0] = 0         LCD1_DATA0 = 0                                          Through the SD pad

BOOT_CFG2[7:5] = 110  LCD1_DATA15=1            LCD1_DATA14=1    LCD1_DATA13=0   8bit DDR mode

BOOT_CFG2[4:3] =11     LCD1_DATA12 = 1   LCD1_DATA11=1                          Boot from uSDHC-4 port

BOOT_CFG2[2] = 0           LCD1_DATA10 = 0                                             BOOT cpu /ddr Frequecy 792/400 MHz

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In additon, see Table 8-18. MMC and eMMC boot details (continued) of reference manual.

In the list, Fast boot and DDR mode are described clearly!

Please let customer try above! If there still exsit issues, I will confirm it with i.MX Expert team!

Have a nice day!

Best Regards,

Weidong

[Aemj]

Hello Weidong,

Thanks for your reply.

On the customer’s lab, they saw boot failed when they set the BOOT_CFGxx as below on the SABRE board.

- LCD1_DATA04(SRC_BOOT_CFG04)=H, LCD1_DATA15(SRC_BOOT_CFG15)=H

In my understanding, one should set BOOT_CFG2[7:5] as below for DDR mode of eMMC.

BOOT_CFG2[7:5]=101: for 4bit DDR

BOOT_CFG2[7:5]=110: for 8bit DDR

Correct?

Best Regards,

Miyamoto

[b50231katsuhiro]

Hi weidong.sun‌

could you please follow-up to this question.

[SLICE]

Hello Weidong,

I am still waiting for your RE.

Thanks,

Miyamoto

[SLICE]

Hello Weidong,

In my customer's understanding, it is possible for i.MX6SX to boot from eMMC with FastBoot and DDR mode simultaneously by setting BOOT_CFG1[4] =1 and BOOT_CFG2[7:5]=110(or 101).

Is it true?

Best Regards,

Miyamoto

[weidong_sun]

Hi Masamichi,

     I discussed the question with FAE and AE team, Fast boot and 8-BIT DDR mode are independent respectively!

I have asked my colleague Jimmy Chan to help to do test on i.MX6SX board for your question, so let us wait for result!

Regards,

Weidong

[SLICE]

Hello wigros.sun‌

Thanks a lot for your support!

I will wait.

Best Regards,

Miyamoto

[weidong_sun]

Hello Masamichi,

   I found there is no eMMC Flash on i.mx6sx evk board, it is DNP status. So we have no way to do the test. We will submit the issue to i.MX Expert team.

   So I have to say sorry for it, we will have to wait for i.MX Expert team's reply!

Have a nice day!

Weidong

[SLICE]

Hello weidong.sun‌

I have asked the customer about boot_cfg1, boot_cfg2 setting.

Please wait for a while.

Best Regards,

Miyamoto

[SLICE]

weidong.sun‌

The settings are as below.

boot_cfg1[7:0] = b'01110000

boot_cfg2[7:0] = b'11010000

Best Regards,

Miyamoto

[SLICE]

jimmychan‌

I posted the settings of boot_cfg1[0:7], bootcfg_2[0-7] to the Community.

https://community.nxp.com/thread/446176 

Thanks,

Miyamoto

[jimmychan]

I got the reply from the expert:

Yes, 6sx support ddr mode + fast boot mode.

But for fast boot mode, 6sx bootrom would not configure SD devices. So the customer need configure their emmc devices into ddr mode by ECSD register as default setting in advance.

[SLICE]

Hi jimmychan‌

Thanks.

What is the ECSD register?

Does it mean CSD registers or Extended CSD registers in eMMC?

[jimmychan]

Extended CSD registers in eMMC

[SLICE]

Hi jimmychan‌

Can you specify the actual address of the ECSD related to the DDR setting?

[jimmychan]

You can find it from the EMMC's datasheet.