Question, i.MX6S LVDS output signals

[Aemj]

Hi team,

I would like to ask about the status of LVDS output signals in the case of disabling LVDS.

In my customer’s application software, the following operation on the LVDS registers is executed when they want to stop the LVDS output from i.MX6S.

LDB Control Register (LDB_CTRL)

ch1_mode[1:0] set to DISABLE

ch0_mode[1:0] set to DISABLE

They want to know the exact status of LVDS output signals at that time.

Actually, they face the issue that the unexpected data could come from capacitive touch panel via I2C at the time.

They believe that the touch panel can receive unexpected data from LVDS output signals.

Could you show me the exact status of LVDS signals in the case of disabling LVDS of i.MX6S?

Thanks,

Miyamoto

[gusarambula]

When disabled the LVDS module signals are set to high impedance. However, this happens at the LVDS module so to make sure you see this on the pins you should leave the IOMUX and PAD unchanged.