Purpose of DQS dummy load on 8M Mini SOM reference design

[adevries]

Hello,

On the reference design for the 8M Mini SOM, there is a capacitor connected to the NAND_DQS pin with the note "Dummy DQS for QSPI High Speed Timing" (see attached image). Can someone explain what the purpose of that capacitor is? How does it assist with QSPI High Speed Timing? Does the value of the capacitance matter?

I have a QSPI device that does not have a data strobe input, so can I just leave this pin unconnected? Or use it as a GPIO?

Thanks

[Yuri · Accepted solution]

Hello,

  from Table 10-2 (External Signal List)  of i.MX 8M Mini  Reference Manual, Rev. 1, 03/2019:

Data Strobe signal Flash A (one of functions for this signal) :

• Loopback dummy read strobe:

FlexSPI controller provides internal dummy read strobe for flash read data. Higher read
frequency can be achieved by looping back  this dummy read strobe from pad. This pin
can be floated or put some cap loads on  board level to compensate DATA/SCLK pins load.

Have a great day,

Yuri.

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[adevries]

Hi Yuri,

Thanks for the info, that helps me understand the purpose of it. Do you know why an 18pF capacitor was chosen as the load? Does NXP provide any guidance on choosing the proper capacitor for that pin?

Thanks

[Yuri]

Hello,

  I am afraid we do not have detailed recommendations regarding choosing the proper capacitor.

Regards,

Yuri.