Problems LPSPI on iMX8ULP

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Problems LPSPI on iMX8ULP

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embeddedtom
Contributor I

I'm trying to use LPSPI4 in my application. I took the following definitions from an example and transferred them to LPSPI4:

&lpspi4 {
fsl,spi-num-chipselects = <1>;
pinctrl-names = "default", "sleep";
pinctrl-0 = <&pinctrl_lpspi4>;
pinctrl-1 = <&pinctrl_lpspi4>;
// cs-gpios = <&gpiof 19 GPIO_ACTIVE_LOW>;
// pinctrl-assert-gpios = <&pca6416_1 10 GPIO_ACTIVE_LOW>;
status = "okay";
 
spidev0: spi@0 {
reg = <0>;
compatible = "lwn,bk4";
spi-max-frequency = <1000000>;
};
};
 
pinctrl_lpspi4: lpspi4grp {
fsl,pins = <
MX8ULP_PAD_PTD20__LPSPI4_SIN 0x3
MX8ULP_PAD_PTD21__LPSPI4_SOUT 0x3
MX8ULP_PAD_PTF10__LPSPI4_SCK 0x3
MX8ULP_PAD_PTF11__LPSPI4_PCS0 0x3
>;
};
 
Adding a UART worked, so in principle I should do it right, spidev0.0 now also exists in /dev, but all lines remain low during access. Would be very grateful for help!
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Chavira
NXP TechSupport
NXP TechSupport

Hi @embeddedtom!
Thank you for contacting NXP Support!

Try with the configuration below:

&lpspi4 {
fsl,spi-num-chipselects = <1>;
pinctrl-names = "default", "sleep";
pinctrl-0 = <&pinctrl_lpspi4>;
pinctrl-1 = <&pinctrl_lpspi4>;
cs-gpios = <&gpiof 11 GPIO_ACTIVE_LOW>;
status = "okay";

spidev0: spi@0 {
reg = <0>;
compatible = "lwn,bk4";
spi-max-frequency = <1000000>;
};
};

pinctrl_lpspi4: lpspi4grp {
fsl,pins = <
MX8ULP_PAD_PTD20__LPSPI4_SIN         0x43
MX8ULP_PAD_PTD21__LPSPI4_SOUT     0x43
MX8ULP_PAD_PTF10__LPSPI4_SCK        0x43
MX8ULP_PAD_PTF11__PTF11                   0x43
>;
};

 

Best Regards!

Chavira

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