When using a 26 MHz crystal, we can disable the MPLL to go to sleep mode. When the crystal is replaced with a 26 MHz oscillator, the MPLL is not reliably disabled.
The Reference manual states:
The conditions to be satisfied before the PLL Clock Controller actually turns off the MPLL are as
follows:
1. Clock Controller module has successfully mastered the system bus.
2. The A9P_CLK_OFF signal from the ARM9 Platform is active.
3. SDRAM controller has successfully placed the external SDRAM into Self-Refresh mode.
4. After the above conditions are satisfied, the countdown based on the value in the SD_CNT field
will be initiated.
5. SD_CNT countdown completes.
What could prevent the Clock Controller module from successfully mastering the system bus?
Hi Craig
Clock Controller module may not successfully master the system bus
due to incorrect power-up sequence or external 26MHz clock noise /
noise on OSC26VDD, MPLLVDD power supplies. Note, external clock should
not be provided to unpowered processor, it should be applied along with
OSC26VDD power supply. In general one can check low power mode sequence
by oscillosope outputting MPLL clock on CLKO pin with CCSR register or
check CKE signal with Figure 18-37. SDRAM/LPDDR Enter Self Refresh Mode
During System Sleep Mode i.MX27 RM.
Datasheet on p.28 recommends to disable oscillator circuit with CSCR (OSC26M_DIS)
and apply clock to EXTAL26M. http://cache.freescale.com/files/dsp/doc/data_sheet/MCIMX27EC.pdf
External clock may not have the desired spectral purity, only a crystal will provide the necessary signal quality.
Below oscillator specs
Best regards
igor
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Igor,
Thanks for the reply.
Where can I find a specification on spectral purity and noise for the 26MHz oscillator?
According to the reference manual it can be a square wave.
When I first started looking at replacing the crystal with an oscillator I could not find any requirements for the i.MX27. A FAE at Avnet said to use the i.MX25 requirements.
Also, with regards to disabling the oscillator, we have tried that and the system does not run. In an earlier post you said:
Hi Chris
this bit can disable internal schematic, related to input 26MHz clock.
OSC26M_DIS = 1 disable 26MHz clock at all. This may be needed, say,
to decrease consumption when 26MHz clock is not used.
So, for any 26MHz configuration (crystal or generator) OSC26M_DIS
should be cleared.
Best regards
igor
Craig
Hi Craig
please create service request for providing
additional documents.
Best regards
igor
How and where do I create a service request?
Craig
To submit case please follow below steps:
1) Go to http://www.nxp.com/support/sales-and-support:SUPPORTHOME.
2) On the bottom of the page under Submit New Issues, click Hardware & Software.
3) Register with your business email to access NXP technical online support.
4) A verification email will be sent to your account. Click the link embedded in that email to verify your access.
5) On the NXP online support page, select Contact Support from the top menu
and click ôsubmit a new caseö to start the process
~igor
Thanks.