Problem booting imx28

[guilherme_mazze]

I have a custom board with the imx28 processor
I have tried the yocto and Ltib toolchain, I have changed the HW_DRAM_CTL29_CONFIG to 0x0302020A

(I'm using 2 512Mbits memory chips MT47H64M16) at the u-boot and kernel for the yocto toolchain and at the imx-bootlets

and kernel for the Ltib toolchain but when I try to boot my image (boot by sdcard + tftp) I get a CRC error

after download the kernel image from tftp or my kernel hangs at diferent moments.

Any idea of what can cause this?

[Yuri]

1.
It makes sense to check memory with a comprehensive test.

2.
The mentioned memory part (MT47H64M16) is not the same as used in i.MX28 EVK.

Therefore some parameter adaptation may be needed. Please use the tool below. 

“Memory controller setup for i.MX28 and i.MX50”

https://community.freescale.com/message/321996#321996

https://community.freescale.com/servlet/JiveServlet/download/300607-249829/MX28_mDDR_register_progra...

3.
If memory parameters are changed some snippets of codes should be modified too.

1. I.MX28 DRAM system under Linux is initialized in bootlets.

Source codes are located in

<ltib>/rpm/BUILD/imx-bootlets-src/boot_prep/init-mx28.c 

To get it, please use the next commands

./ltib -m prep -p imx-bootlets-src

After editing :

./ltib -m scbuild -p imx-bootlets-src

./ltib -m scdeploy -p imx-bootlets-src

As for Linux kernel.

The following kernel files contain support for Linux CPUFREQ (frequency

scaling) feature :

<ltib>/rpm/BUILD/linux-2.6.31/arch/arm/mach-mx28/emi_settings.c

<ltib>/rpm/BUILD/linux-2.6.31/arch/arm/mach-mx28/emi.S 

[fernandolopes]

Hi Yuri Muhin,

I work with Gulherme Mazzela. We are trying to make a memory test, but the only test we could do so far was the mtest from u-boot that did not indicate any error.

I opened a thread asking for help on how to load a dram stress test SB file using sb_loader because the Freescale FAE that supports us is on vacations, so he cannot help us for now.

What are the changes needed in the file "/rpm/BUILD/linux-2.6.31/arch/arm/mach-mx28/emi.S"? It seems to be just a general initialization sequence for the DRAM.

[Yuri]

https://community.freescale.com/servlet/JiveServlet/download/375692-270338/mem_test.7z.zip

[fernandolopes]

We solved our problem.

What was causing these problems were some DDR termination resistors on the data and control lines.

Removing the resistors the problem is gone! :smileylaugh:

[guilherme_mazze]

1. We are tring to use the mx28_dram_stress_test without much success

2. We have used the MX28_DDR2_register_programming_aid_v0.1.xlsx to get the correct values for the dram controler

3. We have changed the values at init-mx28.c for the bootlets and emi_settings.c for the kernel.

We also have tried the yocto toolchain using the u-boot-3013.04 that don't uses the bootlets and

again we didn't get any better result.