Hi Igor,
We actually use the SPI master SSP2 boot from Flash 3.3V and the LCD_RS is set to 1.
D6-D0: 0 0 0 0 0 1 0
I test your proposal and the behaviour is the same:
The DCDC_VDDIO drops from 3.3V to 2.6V after the release of the RESET_N.
I guess there is a wrong setting of a bit or value in the HW_POWER memory map.
Some trials from my side are not successful till now.
Mit freundlichen Gruessen / Best regards
Martin Steurer
AES Aerospace Embedded Solutions GmbH
Abteilungsbezeichnung TEE
Department TEE
Friedenheimer Brücke 29
80639 Muenchen
Germany
Tel +49 (0)89 99 82 72-32 01
Fax +49 (0)89 99 82 72-71 072
mailto:martin.steurer@aesolutions.de
http://www.aesolutions.de<http://www.aesolutions.de/>;
Von: igorpadykov
Gesendet: Mittwoch, 9. März 2016 02:27
An: STEURER, Martin <Martin.Steurer@aesolutions.de>
Betreff: Re: - Power up problems VDDIO
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Power up problems VDDIO
reply from igorpadykov<https://community.freescale.com/people/igorpadykov?et=watches.email.thread> in i.MX Community - View the full discussion<https://community.freescale.com/message/622737?et=watches.email.thread#comment-622737>