Peer-to-Peer using two iMX6Q End-Point SoC

[salil]

Hello,

We are designing a PCIe based system in which iMX6Q might be used in End-Point mode. I went through couple of Freescale links (shown below) and realized many people are trying to achieve the same.

https://community.freescale.com/docs/DOC-95014
https://community.freescale.com/thread/316790

we are trying to achieve Peer-to-Peer communication using 2 iMX6Q in End-Point mode. There were few questions which were going on in my mind and your expertise would be of immense help:

1. If two iMX6Q are configured in End-Point mode and are connected to the Host processor through some PCI Express switch. Is it possible to generate interrupt (Message Signalled Interrupt or MSIs) from
  one End-Point to another? What configuration is required to do so?

2. I came to know about iATU (Address Translation Unit), I read about it from Processor guide and the code in arch/.../pcie.c (I guess written by you :)). it looks outbound initialization code uses hard coded
     physical address 0x40000000 as the target address (I guess upper 256MB of 1 GB RAM are being used for the test purposes) of the mapping.
     In the real scenario like ours i.e. Peer-to-Peer where we are not aware of the physical address of the target device in prior, as End-Point devices may come and go at any time, How should I setup the
     base address to target address mapping?

regards
Salil

[b47504]

I cannot access the link https://community.freescale.com/thread/316790

In theory, you can use your special target address instead of  the hardcode(0x40000000), the iATU will help on the translation between base address and target address.

And the address should be 64k aligned, it is the minimum translation unit, I remembered. 

[jamesbone]

We are working on your issue,  as soon as we get some information we get back to you.

[salil]

Thanks! James, that would be really helpful.