Does the PF0100 SW1A/B output voltage of 1.375V during startup (F3 option for iMX6SoloLite) assume that the internal LDO_ARM in the iMX6SL is enabled? Follow on question, Once everything has powered-up, can I reduce the PF0100 SW1A/B output to 1.2V and bypass the internal LDO_ARM in the iMX6SL for normal operation? Same question for the PF0100 SW1C output for VDD_SOC_IN and VDD_PU_IN.
Hi Muthu Nagarajan,
Yes, by default, the 1.375V from SW1AB_VOLT for the F3 version is in the sequence of SW1AB_SEQ = 2. This means that the PF0100 SW1A/B output voltage of 1.375V will be enabled about 0.5 to 4.0 ms (depending on the tD4 configuration (Table 11 of the datasheet)) after the SW2 Turn-on, even if the internal LDO_ARM in the iMX6SL is enabled.
About bypassing the internal LDO_ ARM in the i.MX6SL, yes, it is possible to bypass it for normal operation and about the SW1A/B and SW1C output voltages, these are programmable from 0.300 to 1.875 V in steps of 25 mV. The output voltage set point is independently programmed for Normal, Standby, and Sleep mode by setting the SW1x[5:0], SW1xSTBY[5:0], and SW1xOFF[5:0] bits respectively. Table 41 of the data sheet shows the output voltage coding for SW1A/B or SW1C.
MMPF0100 Datasheet: http://cache.freescale.com/files/analog/doc/data_sheet/MMPF0100.pdf
Have a great day,
Jose Reyes
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