PCIE layout routing recommendations ?

[peteramond]

Dear All,

For the PCIE differential pairs we need to use differential pairs for routing. 

Is that okay to route as single ended signal for pull down resistors(49.9 Ohms) or pull ups ? Will it affect for PCIE differential pairs if we route pull down as single ended signal ? What should be the impedance for those traces?

Regards,

Peter.

[Rita_Wang]

Generally, the differential Clock and the differential pairs of data transceiver and receiver  are Full Equal Length, and make the line as short as possible. And the impedance is 100Ohm for clock differential, and 85 for Data difference pair.