Need help with connection FPGA to CSI

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Need help with connection FPGA to CSI

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kruglikov_dmt
Contributor III

Hello. I need help with connection FPGA to CSI (imx6 Solo).

I'm using parallel connection, internal sync, 54MHz clock and without I2C control.

FPGA just is generating videostream (BT1120).

And I don't understand how to link FPGA and vide0 device.

I configured IOMUX in accordance with imx6 datasheet ( http://cache.freescale.com/files/32bit/doc/data_sheet/IMX6DQCEC.pdf ):

&iomuxc {

      ...

      pinctrl_ipu1: ipu1grp { // my FPGA data-pins and pixel clock
            fsl,pins = <
                MX6QDL_PAD_CSI0_DAT12__IPU1_CSI0_DATA12          0xb0b1
                MX6QDL_PAD_CSI0_DAT13__IPU1_CSI0_DATA13          0xb0b1
                MX6QDL_PAD_CSI0_DAT14__IPU1_CSI0_DATA14          0xb0b1
                MX6QDL_PAD_CSI0_DAT15__IPU1_CSI0_DATA15          0xb0b1
                MX6QDL_PAD_CSI0_DAT16__IPU1_CSI0_DATA16          0xb0b1
                MX6QDL_PAD_CSI0_DAT17__IPU1_CSI0_DATA17          0xb0b1
                MX6QDL_PAD_CSI0_DAT18__IPU1_CSI0_DATA18          0xb0b1
                MX6QDL_PAD_CSI0_DAT19__IPU1_CSI0_DATA19          0xb0b1
                MX6QDL_PAD_CSI0_PIXCLK__IPU1_CSI0_PIXCLK        0xb0b1
            >;
        };

      ...

}

Then I configured v4l2 device:

   v4l2_cap_0 {
        compatible = "fsl,imx6q-v4l2-capture";
        ipu_id = <0>; // IPU1
        csi_id = <0>; // CSI0
        mclk_source = <0>;
        status = "okay";
    };

What is next ?

Should I configure an additional device driver ( such as ipu1:ipu@02400000 ) ?

Or, maybe, I should also to modify OV5640 (or OV5642)  and configure it, something like a:

   ov5640 {
        compatible = "ovti,ov5640";
        //reg = <0x3c>;
        pinctrl-names = "default";
        pinctrl-0 = <&pinctrl_ipu1>;
        clocks = <&clks 200>; // what is it?
        clock-names = "csi_mclk"; // and it?
        //pwn-gpios = <&gpio3 4 0>; // can I just a comment it to disable?
        //rst-gpios = <&gpio3 5 0>;
        csi_id = <0>;
        mclk = <54000000>;
        mclk_source=<0>;
    };

Or I should to configure and use IPU-CSI driver? Something like a:

    ipu1: ipu@02400000 {
        #address-cells = <1>;
        #size-cells = <0>;
        compatible = "fsl,imx6q-ipu";
        reg = <0x02400000 0x400000>;
        interrupts = <0 6 IRQ_TYPE_LEVEL_HIGH>,
            <0 5 IRQ_TYPE_LEVEL_HIGH>;
        clocks = <&clks IMX6QDL_CLK_IPU1>,
            <&clks IMX6QDL_CLK_IPU1_DI0>,
            <&clks IMX6QDL_CLK_IPU1_DI1>,
            <&clks IMX6QDL_CLK_IPU1_DI0_SEL>,
            <&clks IMX6QDL_CLK_IPU1_DI1_SEL>,
            <&clks IMX6QDL_CLK_LDB_DI0>,
            <&clks IMX6QDL_CLK_LDB_DI1>;
        clock-names = "bus", "di0", "di1", "di0_sel", "di1_sel", "ldb_di0", "ldb_di1";
        resets = <&src 2>;
        bypass_reset = <0>;
    };

I found similar topics ( Use FPGA as camera input - IPU CSI Parallel https://community.nxp.com/thread/429637, e.g. ) but no specific answers.

Thanks!

Labels (4)
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3 Replies

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429620426
Contributor I

Has the problem been solved?If it has been solved, can you give me a reference?E-mail: 429620426 @qq.com

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606 Views
zhouqi
Contributor II

hi man

    have you solved this problem later?

    can you give me some help?

   thank you very much

Best regards 

zhou

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684 Views
igorpadykov
NXP TechSupport
NXP TechSupport

Hi Eugene

one can try to reuse OV5640 driver, removing unrelevant to fpga codes,

description can be found in sect.6.1.3 Parallel CSI attached Linux Manual,

also may be useful Porting Guide included in Linux L4.14.98_2.0.0 Documentation

Best regards
igor
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