More operating-points (Linux PM) for i.MX7D?

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More operating-points (Linux PM) for i.MX7D?

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uthappapj
Contributor II

Hi everyone,

    At present, it seems that the current Linux kernel that's supported and maintained for the i.MX7D has provision for only two operating-points ("ARM frequency - Voltage" pairs) usable by the Linux power-management framework. This can be seen in the code too: ( linux-2.6-imx.git - Freescale i.MX Linux Tree)

Untitled.png

     That is, basically, frequencies 1GHz and 800MHz are supported right now. Can the i.MX7D support operating-points with frequencies less than 800MHz like 600MHz, 400MHz and 200MHz? If yes, then is some work already underway for implementing the same? Any idea on when that code will be GA'ed?

Best regards,

Uthappa

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igorpadykov
NXP Employee
NXP Employee

Hi Uthappa

number of operating points is defined in Table 9. Operating ranges i.MX7D Datasheet

http://cache.nxp.com/files/32bit/doc/data_sheet/IMX7DCEC.pdf

Only these are tested.

Best regards

igor

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igorpadykov
NXP Employee
NXP Employee

Hi Uthappa

number of operating points is defined in Table 9. Operating ranges i.MX7D Datasheet

http://cache.nxp.com/files/32bit/doc/data_sheet/IMX7DCEC.pdf

Only these are tested.

Best regards

igor

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Note: If this post answers your question, please click the Correct Answer button. Thank you!

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uthappapj
Contributor II

Hey Igor,

    Thanks for the reply. So based on the i.MX7D datasheet and existing code modifications such as http://git.freescale.com/git/cgit.cgi/imx/linux-2.6-imx.git/commit/arch/arm/boot/dts/imx6ul.dtsi?h=i...  to other i.MX application processors, would the following modification be theoretically correct?

---8<----------------------------------------------------------------------------------------------------------------------------------------

--- linux-rel_imx_4.1.15_1.2.0_ga_old/arch/arm/boot/dts/imx7d.dtsi2016-06-30 14:23:04.000000000 +0530
+++ linux-rel_imx_4.1.15_1.2.0_ga_new/arch/arm/boot/dts/imx7d.dtsi2016-07-13 17:43:30.451719768 +0530

@@ -55,6 +55,7 @@

                            /* KHz  uV */
                            996000  1075000
                            792000  975000
+                           396000  975000
                    >;
                    clock-latency = <61036>; /* two CLK32 periods */
                    clocks = <&clks IMX7D_ARM_A7_ROOT_CLK>, <&clks IMX7D_ARM_A7_ROOT_SRC>,

-------------------------------------------------------------------------------------------------------------------------------------->8---

    Since I am trying to lower the CPU clock I feel the confident that in the worst case it may only just fail to boot with the built kernel. What's your opinion? Is there anything other than this I may need to check or modify? I am quite certain I will have to test all the peripherals after this modification. I wonder if I would see any savings in SoC power consumption after this.

Best regards,

Uthappa

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igorpadykov
NXP Employee
NXP Employee

Hi Uthappa

there is nothing wrong in that additional point

since it does not change core voltage.

Number of operating points  (voltage dependent and factory tested)

is defined in Table 9. Operating ranges i.MX7D Datasheet

Best regards

igor

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uthappapj
Contributor II

Hi Igor,

    I built the kernel with the following mod:

---8<---------------------------------------------------------------------------------------------------------------------------------------------

diff -Naur old/arch/arm/boot/dts/imx7d.dtsi new/arch/arm/boot/dts/imx7d.dtsi

--- old/arch/arm/boot/dts/imx7d.dtsi    2016-06-30 14:23:04.000000000 +0530

+++ new/arch/arm/boot/dts/imx7d.dtsi    2016-07-14 13:47:29.994582643 +0530

@@ -55,6 +55,9 @@

                                /* KHz  uV */

                                996000  1075000

                                792000  975000

+                               648000  975000

+                               324000  975000

+                               162000  975000

                        >;

                        clock-latency = <61036>; /* two CLK32 periods */

                        clocks = <&clks IMX7D_ARM_A7_ROOT_CLK>, <&clks IMX7D_ARM_A7_ROOT_SRC>,

--------------------------------------------------------------------------------------------------------------------------------------------->8---

    And things seem to be working well. Basic peripherals are working. And the system is switching between the frequencies nicely based on the CPU load ("ondemand" governor). When idling the 162MHz frequency is used. I still need to measure the change in the SoC power consumption though.

Thanks and regards,

Uthappa

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