Nice to meet you all.
I made a new iMX6 solo based on the iMX6 Q SABRE SD board.
Because solo has a 32bit memory bus, I used 1GB memory (512MB x 2). In that case, I wired A14 and A15 (just to be sure) to the memory chip.
The memory capacity is only 512MB for both u-boot and DDR Stress Tester.DDR Stress Tester shows Data width:32bit, bank num:8, Row size:14, col size:10. Row size is 1 missing.
Is there anything I should take care of in the design?
Please contact us.
Memory chip part number
IS43/46TR16256BL (DDR3L 256Mx16)
The DDR Stress Tester indicates the following
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DDR Stress Test (1.0.3) for MX6DL
Build: Jun 25 2014, 12:09:29
Freescale Semiconductor, Inc.
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=======DDR configuration==========
BOOT_CFG3[5-4]: 0x00, Single DDR channel.
DDR type is DDR3
Data width: 32, bank num: 8
Row size: 14, col size: 10
Chip select CSD0 is used
Density per chip select: 512MB
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Hi, all
I updated the *.inc file using the "i.MXDL MMDC DDR3 Configuration Spreadsheet" and the DDR Stress Tester recognized 1GB.
However, the DQS gating calibration fails and there is a new problem.
The issue with the topic has been resolved and should be closed.
Thank you.