MX95 system manager error id 160

hankwang

影像.pngHI,

We are encountering an issue on our MX95 platform when running Real-Time-Edge software version 3.3, where Error ID 160 of system manager is triggered.

Interestingly, we do not see this error when running software version 3.4 on the same MX95 platform.

Could you help us understand:

What Error ID 160 typically indicates in version 3.3?

Whether this is a known issue that has been addressed or patched in version 3.4?

Any recommended workarounds or debugging steps for version 3.3?

Zhiming_Liu

Hi @hankwang
Yes, this is a known issue on ELE firmware 2.0.3(Real Time Edge 3.3). Starting with version ELE firmware 2.0.4, the ELE firmware introduces new APIs for clock/voltage changes and security sensor management. On i.MX95 B0 mass-production chips, DVFS adjustments must be made after the SM boots.

Newly mass-produced chips have the security sensor fuse enabled. If seurity sensors are enabled, the ELE firmware and SM must coordinate to temporarily disable the sensors; otherwise, the ELE’s frequency detector will interpret this as a “reference clock loss,” triggering a Group-1 reset.

Older versions of ELE firmware (≤2.0.3) do not support this handshaking mechanism, so when the SM begins adjusting the clock after DDR OEI completion, it triggers errId=160. Upgrading the components will resolve this issue.

Best Regards,
Zhiming

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hankwang

Hi @Zhiming_Liu Thank you for the detailed description. We got it.

hankwang

Hi @Zhiming_Liu Thank you for the information. Is this a known issue? However, the MX95 EVK development board did not exhibit this problem when using version 3.3. So, we want to find out what is happening with ELE on our board for 3.3. However, it seems that version 3.4 has already resolved this issue?

Zhiming_Liu

Hi @hankwang
Yes, this is a known issue on ELE firmware 2.0.3(Real Time Edge 3.3). Starting with version ELE firmware 2.0.4, the ELE firmware introduces new APIs for clock/voltage changes and security sensor management. On i.MX95 B0 mass-production chips, DVFS adjustments must be made after the SM boots.

Newly mass-produced chips have the security sensor fuse enabled. If seurity sensors are enabled, the ELE firmware and SM must coordinate to temporarily disable the sensors; otherwise, the ELE’s frequency detector will interpret this as a “reference clock loss,” triggering a Group-1 reset.

Older versions of ELE firmware (≤2.0.3) do not support this handshaking mechanism, so when the SM begins adjusting the clock after DDR OEI completion, it triggers errId=160. Upgrading the components will resolve this issue.

Best Regards,
Zhiming

Zhiming_Liu

Hi @hankwang

Please refer the sm reference manual for error code.

Zhiming_Liu_0-1788133801920.png

This error is related to the ELE version. If you want to verify this, you can use the ELE from version 3.4 in version 3.3, and the ELE from version 3.3 in version 3.4.

Best Regards,
Zhiming