MX8MQ - Trouble getting HB-050WISB0GA0-B HDMI display working

[bshortridge]

I'm having issues with connecting the DART-MX8M board running Yocto to a HDMI screen. It works fine if I connect it to a HDMI monitor, but when I try to connect it to the display we want to use (HB-050WISB0GA0-B), it doesn't work, I see the following reported over the USB Debug cable:

[ 5149.145476] cdns-mhdp-imx 32c00000.hdmi: 0,ff,ff,ff,ff,ff,ff,0
[ 5149.151498] [drm] Cannot find any crtc or sizes
[ 5149.177868] cdns-mhdp-imx 32c00000.hdmi: 0,ff,ff,ff,ff,ff,ff,0
[ 5149.210668] cdns-mhdp-imx 32c00000.hdmi: 0,ff,ff,ff,ff,ff,ff,0              
[ 5149.216635] [drm] Cannot find any crtc or sizes                             
[ 5149.221192] [drm] HDMI Cable Plug In

To set the HDMI output (works with HDMI monitor, just not this display) I used:
# cd /boot
# ln -fs imx8mq-var-dart-dt8mcustomboard-wifi-hdmi.dtb imx8mq-var-dart-dt8mcustomboard.dtb

The display itself works fine if I connect it to my laptop.

I saw this thread: https://community.nxp.com/t5/i-MX-Processors/HDMI-DRM-custom-resolution-and-clock-frequency/m-p/1029... which claims that I need to input timing parameters into the spreadsheet and then modify the kernel, but I've got no idea what many of the parameters are, and I can't find them on the datasheet:

Pixel encoding: RGB
Color depth: 8
Reference clock frequency [MHz]: ?
Expected pixel clock frequency [MHz]: 25.00?
Generated clock tolerance [%]: ?

Pll input divider: ?
Pll feedback divider: ?
Pixel clock divider: ?
Character clock divider: ?

I can get an edid file by:
# cat /sys/devices/platform/soc@0/soc@0:bus@32c00000/32e00000.display-controller/drm/card0/card0-HDMI-A-1/edid > ~/edid.bin

If I then parse that file with parse-edid < edid.bin, it reports this:

Checksum Correct

Section "Monitor"

        Identifier "HDMI Panel W"

        ModelName "HDMI Panel W"

        VendorName "DWI"

        # Monitor Manufactured week 9 of 2020

        # EDID version 1.4

        # Digital Display

        DisplaySize 890 500

        Gamma 2.20

        Option "DPMS" "false"

        Horizsync 14-70

        VertRefresh 50-70

        # Maximum pixel clock is 50MHz

        #Extension block found. Parsing...

        Modeline        "Mode 2" 25.200 640 656 752 800 480 490 492 525 -hsync -vsync

        Modeline        "Mode 0" +hsync -vsync 

        Modeline        "Mode 1" +hsync -vsync 

        Option "PreferredMode" "Mode 2"

EndSection

Please help.

Thanks