MPF0010N PMIC LDO ouput capacitance selection

[toddkeppler]

Regarding the MPF0010N PMIC,

The Datasheet and reference design uses 2.2uF and 4.7uF caps on the LDO outputs for the device.  Is it ok to use 10uF caps on the output of all the LDOs instead?   Are there any Stability issues in doing this or will the extra capacitance cause a problem with the internal current limit and not allow outputs to come up correctly?

Also bit REGSCPEN is part of the PWRCTL register. can it only be set through I2C which datasheet seems to indicate or can it be set in OTP configuration?






 
 
 
 
 
 
 
 
 
 
 
 

[art]

Yes, it is possible to use 10uF bulk capacitors on all of the VGEN1 to VGEN6 LDO outputs. Please note that too high capacitance on any of the VGENx rails can cause slower voltage output ramp-up at power-on time. The reason is that each of the VGENx LDOs has internal current limiter, so, larger bulk capacitance will require more time to be charged by fixed current in case of current limitation at power-on.

Have a great day,
Artur

-----------------------------------------------------------------------------------------------------------------------
Note: If this post answers your question, please click the Correct Answer button. Thank you!
-----------------------------------------------------------------------------------------------------------------------