MIPI DSI display problems

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MIPI DSI display problems

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simonstürz
Contributor I

Hello everyone!

I am currently trying to enable my MIPI-DSI display and I have some problems with my module and I hope you can help me.

I used the https://github.com/t-mon/linux-linaro-stable-mx6/blob/linux-linaro-lsk-v3.14-mx6/drivers/video/mxc/m...  as template for the panel and changed:

  • mipid_hx8369_lcd_setup ()
  • struct mipi_lcd_config lcd_config
  • truly_lcd_modedb[]

My Display: http://kingtechgroup.en.alibaba.com/product/60176023919-801063540/1_5_inch_320x320_circular_lcd_disp...

The datasheet of the OTM3201A is in the attachment.

My current code can be found here:

https://guh.guru/downloads/scripts/mxcfb_hx8369_wvga.c

For the init section I used the recommendations from Kingtech.

At the current development state I am controlling the display brightness directly with the PWM.

The kernel log seems to be ok...

[    0.074780] mipi_dsi_pwr_on: no parameters

[    0.597368] mxc_mipi_dsi 21e0000.mipi: i.MX MIPI DSI driver probed

[    0.598035] mxc_sdc_fb fb.24: register mxc display driver mipi_dsi

[    0.606523] mxc_mipi_dsi 21e0000.mipi: start MIPI DSI LCD setup.

[    0.606530] mxc_mipi_dsi 21e0000.mipi: Engineering Mode Enable...OK.

[    0.608513] mxc_mipi_dsi 21e0000.mipi: Register write mode enable...OK.

[    0.608520] mxc_mipi_dsi 21e0000.mipi: Display Inversion Control...OK.

[    0.610511] mxc_mipi_dsi 21e0000.mipi: Set pixel format - 24 bits/pixel...OK.

[    0.612512] mxc_mipi_dsi 21e0000.mipi: RGB Interface Blanking Porch setting...OK.

[    0.612518] mxc_mipi_dsi 21e0000.mipi: Timing structure register...OK.

[    0.614511] mxc_mipi_dsi 21e0000.mipi: Landscape MIPI Video Mode...OK.

[    0.616510] mxc_mipi_dsi 21e0000.mipi: MIPI RX Delay Setting...OK.

[    0.618510] mxc_mipi_dsi 21e0000.mipi: Gamma Voltage adjust Control...OK.

[    0.618516] mxc_mipi_dsi 21e0000.mipi: Display Inversion Off...OK.

[    0.630509] mxc_mipi_dsi 21e0000.mipi: Gamma Correction Characteristics Setting...OK.

[    0.630516] mxc_mipi_dsi 21e0000.mipi: Sleep out...OK.

[    0.632513] mxc_mipi_dsi 21e0000.mipi: Display ON...OK.

The frame buffer device seems to be ok...

$ cat /sys/class/graphics/fb0/mode

U:320x320p-60

My uEnv.txt file:

mmcargs=setenv bootargs root=/dev/mmcblk0p1 rootfstype=ext4 rootwait console=tty1 console=ttymxc0,115200 video=mxcfb1:dev=mipi_dsi rd.dm=0 rd.luks=0 rd.lvm=0 raid=noautodetect pci=nomsi ahci_imx.hotplug=1 consoleblank=0 vt.global_cursor_default=0

My device tree blob configuration (MIPI-DSI relevant sections):

aliases {

     mxcfb0 = &mxcfb1;

};

reg_mipi_dsi_pwr_on: mipi_dsi_pwr_on {

     compatible = "regulator-fixed";

     regulator-name = "mipi_dsi_pwr_on";

     gpio = <&gpio6 14 0>;

     enable-active-high;

};

mipi_dsi_reset: mipi-dsi-

     compatible = "gpio-

     reset-gpios = <&gpio7 12

     reset-delay-us = <

     #reset-cells = <0>;

};

mxcfb1: fb@0 {

     compatible = "fsl,mxc_sdc_fb";

     disp_dev = "mipi_dsi";

     interface_pix_fmt = "RGB565";

     mode_str ="TRULY-WVGA";

     default_bpp = <24>;

     int_clk = <0>;

     late_init = <0>;

     status = "okay";

};

&mipi_dsi {

        dev_id = <0>;

        disp_id = <0>;

        lcd_panel = "TRULY-WVGA";

        disp-power-on-supply = <&reg_mipi_dsi_pwr_on>;

        resets = <&mipi_dsi_reset>;

        status = "okay";

};

The problem: the display never shows anything...I tried startx, i tried fbi... nothing. Just a black display (with brigthness on).

I think the problem is the display configuration. How do I calculate the pixel clock? How do I select the sync mode? I found nothing in the datasheet and Kingtech could not help me.

$ fbset --info

mode "320x320-227"

    # D: 26.399 MHz, H: 76.742 kHz, V: 227.047 Hz

    geometry 320 320 320 320 24

    timings 37880 8 8 6 6 8 6

    sync 0x80000000

    rgba 8/16,8/8,8/0,0/0

endmode

Frame buffer device information:

    Name        : DISP3 BG

    Address     : 0x20080000

    Size        : 307200

    Type        : PACKED PIXELS

    Visual      : TRUECOLOR

    XPanStep    : 1

    YPanStep    : 1

    YWrapStep   : 1

    LineLength  : 960

    Accelerator : No

I hope I have not forgotten any information. I am thankful for any suggestions.

Best reguards,

Simon

Labels (3)
1 Solution
2,068 Views
simonstürz
Contributor I

I solved the problem!

the timings were totally wrong:

left margin       ->  HBP     -> 42  

right margin     ->  HFP     -> 26  

upper margin   ->  VBP     -> 10  

lower margin    ->  VFP     -> 2   

hsync length     -> HPW    -> 10

vsync length     -> VSW    -> 2 

Pixel clock = 1*10^12 [ps] / ( (320+42+26+10)*(320+10+2+2)*60 ) = 125377.38 = 125377

Thx to this formula: http://freescale-club.ru/archive/index.php/t-307.html

View solution in original post

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enrico_papi
Contributor II

Hi all,

I'm searching which GPIO should be used in the "mipi_dsi_reset" node of the devicetree.

Looking into the i.MX6 reference manual the MIPI DSI Host controller does not have a reset pin.

Where the value "gpio7 12" you used comes from?

Thank you.

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kunalkulshresth
Contributor III

Hi Simon,

simonstürz

Can you please let me know how you used startx or fbi on iMX6 platform to display images? I am working on similar Mipi Dsi interfacing of a round oled on iMX6DL but it does not show anything even though I see the clock and traffic on data lines. Please let me know way to quickly test image display atleast to verify oled. Any other inputs will be very helpful while you did this mipi dsi interfacing.

Thanks and regards,

Kunal

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swapniltiwari
Contributor II

Hi simon,

How you are controlling backlight of OTM3201A i am not seeing any register in your code for backlight

nor in the specification. how can you use original mxcfb_hx8369_wvga.c backlight callback its

a different driver IC.

regards

swapnil

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2,069 Views
simonstürz
Contributor I

I solved the problem!

the timings were totally wrong:

left margin       ->  HBP     -> 42  

right margin     ->  HFP     -> 26  

upper margin   ->  VBP     -> 10  

lower margin    ->  VFP     -> 2   

hsync length     -> HPW    -> 10

vsync length     -> VSW    -> 2 

Pixel clock = 1*10^12 [ps] / ( (320+42+26+10)*(320+10+2+2)*60 ) = 125377.38 = 125377

Thx to this formula: http://freescale-club.ru/archive/index.php/t-307.html

View solution in original post

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chiranjeevikinn
Contributor III

Hello Simon,

I am also facing problem with initialization of my MIPI TFT display. could you please help me in this regard.

Below are the details of my display.

Refresh  = 60 Hz

xres  = 640

yres  = 1136

pixclock = 68400

left_margin = 40

right_margin = 40

upper_margin = 348

lower_margin = 13

hsync_len = 40

vsync_len = 3

sync = 0

vmode = FB_VMODE_NONINTERLACED

http://www.dlcdisplay.com/UploadFiles/file/DLC0400KZG.pdf

I have used below formula to calculate pixclock.

(1135+13+348+3)=1500*(640+40+40+40)=760*60/1000

Thanks in advance.

Best Regards,

Chiranjeevi

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CarlosCasillas
NXP Employee
NXP Employee

Hello Simon,

Glad to hear that you solved your issue, thanks for sharing your solution with the Community!

Best regards!

/Carlos.

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