MCIMX6G3CVM05AA reset circuit

[surendrajadhav]

Hello,

We are using POR (P8) signal to reset the CPU. Here the reset to this pin is done by ORing the following reset sources. 1.Reset using Power-On Reset chip

2.Reset using Watch dog timer chip

3.Reset using Undervoltage/Overvoltage monitor chip

4.Reset using PMIC reset out

The same is shown in the attached images.

Now please let me know if my reset startegy is correct or not. Do I need to take care of something else.

Regards

[surendrajadhav]

Dear Igor,

Thanks a lot for your reply.

I went through i.MX6UL EVK schematic SPF-28617, where I learned that supervisory reset chip U708 is used to drive Enable pin of main switcher. Enable is also controlled through MX6_POR_B(Tact switch) and nWDOG.

In my circuit I have used separate pin to reset eMMC. DDR3L is also having its own reset input driven through CPU.

eCSPI is also having a dedicated reset using GPIO pin of CPU.

Now my concern is with CPU that I want to reset the CPU in case of follwoing events.

1. External Watch dog timer timeout event

2.Undervoltage on any critical power(Which we are monitoring)

3.Reset event from PMIC (RESETBMCU)

As I shown in earlier image where I am ORing these above three inputs and in case of above condition is true, a RESET on POR of the CPU is generated.

Please once again let me knwo your inputs on this.

Regards,

Surendra

[igorpadykov]

Hi Surendra

in attached image it is not shown that all power supplies of board are reset.

Please verify that this resets all board power supplies

Best regards
igor

[surendrajadhav]

Hello Igor,

Please find the attached image where it shows that PMIC_ON_REQ pin is generated by CPU on T9 pin. When this is generated either by CPU or Internal watchdog or external reset switch, PMIC chip PWRON pin is driven.

In this case PMIC chip may go in OFF state or sleep mode. This shall disable power of all the chips available on board such as eMMC, DDR3L and others.

In case of external watchdog miss event or undervoltage,  POR_B is generated which shall drive POR pin of the CPU only and put the CPU to reset.

In other words external switch, Internal watchdog or CPU can drive PWRON of PMIC which shall power down for all the available chips on board.

In case when there is external watchdog miss event or undervoltage on power rail is detected only CPU is resetted using POR pin.

Regards,

Surendra

[igorpadykov]

Hi Surendra

if PMIC chip PWRON pin is driven by reset then this is fine solution.

Best regards
igor

[surendrajadhav]

Thanks a lot Igor.

[igorpadykov]

Hi Surendra

recommended to perform whole board reset as it is done in
i.MX6UL EVK schematic SPF-28617 using U708 (POR,WDOG) and
gating DCDC_3V3, as some components are not reset with POR only,
these include (but may not be limited to):
• eMMC memory card (if the hardware RST_B pin is not connected.
• SD Card/socket (if the reset pin is not used to remove power to the SD Card)
• QSPI
• LPDDR2/3 memory

Best regards
igor
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