MCIMX6D5EYM12AD Audio Interface Support

[sathiyandurai]

Hello Frnds,

We are using MCIMX6D5EYM12AD has CPU in our project and going to interface with audio codec from maxim and thier part number is MAX9867.

MAX9867 has I2S Signal LRCLK, BCLK , MCLK, SDIN and SDOUT.

Tell me whether IMX6D support I2S Interfcae or not?

Tell me how to interface these signals with our IMX6D CPU?

Thanks

Sathiyan. D

[gusarambula]

The i.MX6D does have I2S support trough the SSI (Synchronous Serial Interface) module. You may find more details on this functionality and signals on section 61.1.1 of the i.MX6D Reference Manual (link below)

http://cache.freescale.com/files/32bit/doc/ref_manual/IMX6DQRM.pdf

The Synchronous Serial Interface (SSI) is connected through the Digital Audio Multiplexer (AUDMUX). Refer to the AUDMUX chapter for programming details of the various multiplexing options. As for how to connect the signals this is an example using the AUDMUX port 3.

AUD3_TXFS        LRCLK
AUD3_TXC          BCLK
AUD3_TXD          SDIN (DACDAT)
AUD3_RXD         SDOUT (ADCDAT)

AUD_MCLK        MCLK

You can see an implementation of an I2S Codec on the i.MX6 SABRE SD schematic available at Freescale’s Website.

[kneetofs]

I am also trying to connect a audio codec to the iMX6 and are a little confused regarding the MCLK in the answer above.

Regarding the AUD_MCLK signal, I can not find any dedicated function in the reference manual for that.

When looking in the schematic the "AUD_MCLK" signal is comming from the GPIO_0, and I assume that it uses the CCM_CLKO1 function.

Could you use the other clock output (CCM_CLKO2) instead to provide a system clock for the codec or are there any other relations regarding the I2S interface and CCM_CLKO1?