Hi,
I am attempting to configure the device tree to get an external ADIN1300 phy managed by a MDIO on our custom hardware board working. The SOM is the iMX8MP and the carrier board is our in-house design. The link LEDs for both Ethernets light up but no connection is established with the test laptop. FULL DISCLOSURE I am relatively new to the Linux Device Tree stuff.
This is what the relevant parts of the device tree look like:
reg_fec_phy: regulator-fec-phy {
compatible = "regulator-fixed";
regulator-name = "fec-phy";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
regulator-enable-ramp-delay = <20000>;
gpios = <&gpio_exp1 16 GPIO_ACTIVE_LOW>; // EXP_MDIO_EN
regulator-always-on;
regulator-boot-on;
};
vddio1: vddio-regulator {
compatible = "regulator-fixed";
regulator-name = "vddio1";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
regulator-always-on;
regulator-boot-on;
};
&fec {
compatible = "fsl,imx8mp-fec", "fsl,imx8mq-fec", "fsl,imx6sx-fec";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_fec>;
phy-mode = "rgmii";
phy-handle = <ðphy1>;
phy-supply = <®_fec_phy>;
status = "okay";
mdio {
#address-cells = <1>;
#size-cells = <0>;
ethphy1: ethernet-phy@5 {
compatible = "adi,adin1300", "ethernet-phy-ieee802.3-c22";
reg = <5>;
eee-broken-100tx;
eee-broken-1000t;
reset-gpios = <&gpio_exp1 15 GPIO_ACTIVE_LOW>; // EXP_ENET1_RESET_B
reset-assert-us = <10000>;
reset-deassert-us = <20000>;
vddio-supply = <&vddio1>;
};
};
};
pinctrl_fec: fecgrp {
fsl,pins = <
MX8MP_IOMUXC_SAI1_RXD2__ENET1_MDC 0x140
MX8MP_IOMUXC_SAI1_RXD3__ENET1_MDIO 0x140
MX8MP_IOMUXC_SAI1_RXD4__ENET1_RGMII_RD0 0x91 // SCHMITT, FAST
MX8MP_IOMUXC_SAI1_RXD5__ENET1_RGMII_RD1 0x91 // SCHMITT, FAST
MX8MP_IOMUXC_SAI1_RXD6__ENET1_RGMII_RD2 0x91
MX8MP_IOMUXC_SAI1_RXD7__ENET1_RGMII_RD3 0x91
MX8MP_IOMUXC_SAI1_TXC__ENET1_RGMII_RXC 0x91
MX8MP_IOMUXC_SAI1_TXFS__ENET1_RGMII_RX_CTL 0x91
MX8MP_IOMUXC_SAI1_TXD0__ENET1_RGMII_TD0 0x1f
MX8MP_IOMUXC_SAI1_TXD1__ENET1_RGMII_TD1 0x1f
MX8MP_IOMUXC_SAI1_TXD2__ENET1_RGMII_TD2 0x1f
MX8MP_IOMUXC_SAI1_TXD3__ENET1_RGMII_TD3 0x1f
MX8MP_IOMUXC_SAI1_TXD4__ENET1_RGMII_TX_CTL 0x1f
MX8MP_IOMUXC_SAI1_TXD5__ENET1_RGMII_TXC 0x1f
MX8MP_IOMUXC_SAI1_MCLK__ENET1_TX_CLK 0x4000001f
>;
};
Any assistance is appreciated.