LVDS interface problem on i.MX53

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LVDS interface problem on i.MX53

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rostislav
Contributor III

I found weird behavior of the LVDS.

Only reasonable explanation is that  LDB_CTRL bits 5 and 6 are exchanged.

Another possible typo in the document is description of bit_mapping_ch0:

0 Use SPWG standard.
1 Use JEIDA standard.

I found that VESA (I believe that the same as SPWG) LVDS display works properly if the bit_mapping_ch0 is set.

After modification of the bits definition the color on the 18 bpp LCD of Touch Revolution became proper.

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rostislav
Contributor III

Thanks, Vladan.

Done

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VladanJovanovic
NXP Employee
NXP Employee

Hi,

If you believe there's an error in documentation, please enter a Service Request to Freescale via www.freescale.com/support 

Regards,

Vladan

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rostislav
Contributor III

Document that probably has typos is:

i.MX53 Multimedia Applications
Processor Reference Manual
Document Number: iMX53RM
Rev. 2, 12/2011

The Kernel code definitions are the same as in the document.

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