LVDS Display Issue

[leavs]

Hi,

I use IMX6DL, Kernel3.14.52, Uboot2015.04. Now I'm porting one LCD which is LVDS port. Follow is its timing.

My device tree config is follow:

I also check waveform from scope , clock is 39.9MHz

The attach is my LVDS LCD display.

Anyone can help me solve this problem ?

[rogerio_silva]

Hi Leavs,

The waveform of your display seems to be equal from the one we use as default on i.MX6 SabreSD board. We use HSD100PXN1 from Hannstar.

About the timings, there are missing information on your table. As example, please check the document attached.

Best regards,

Rogerio

[leavs]

Hi,

Thanks for your reply. I tested add <de-active> <pixelclk-active> <vsync-active > <hsync-active>  and change diffrent value, but the result is same to previous test.

[igorpadykov]

please also check similar issues on

Cloning a display 

LVDS output on Apalis i.MX6 (IXORA Board) - Toradex Community 

Best regards
igor

[igorpadykov]

Hi leavs

one can change fsl,data-width = <18>; and select appropriate kernel boot parameter

using Table 11. Common kernel boot parameters attached Release Notes,

try with nxp bsps described on

http://www.nxp.com/products/software-and-tools/software-development-tools/i.mx-software-and-tools/i....

Best regards
igor
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[leavs]

Hi igorpadykov,

I had tested the data-width = <18>, but it didn't work. Do you have any other idea?